Patents by Inventor Jen-Tsung Lin

Jen-Tsung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11924984
    Abstract: A display including a screen, a bracket, a hanging element and a fixing element is provided. The support is connected to the screen and has a top end and a bottom end. The hanging element is disposed on the top end. The fixing element is disposed at the bottom end. When the hanging element is hung on an upper edge of a plate, the fixing element is fixed on a surface of the plate.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: March 5, 2024
    Assignee: Qisda Corporation
    Inventors: Jen-Feng Chen, Yien-Bo Chen, Kuan-Hsu Lin, Hsin-Hung Lin, Nien-Tsung Hsu
  • Patent number: 8995207
    Abstract: According to an embodiment, an apparatus includes a data storage device. Data to be stored in the data storage device is level shifted from a first voltage domain to a second voltage domain prior to being stored within the data storage device. The data storage device is powered by the second voltage domain. The apparatus further includes a circuit that is powered by the second voltage domain and that is responsive to data output by the data storage device.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: March 31, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Christopher Edward Koob, Jen Tsung Lin, Manojkumar Pyla, Martin Saint-Laurent
  • Publication number: 20130039133
    Abstract: According to an embodiment, an apparatus includes a data storage device. Data to be stored in the data storage device is level shifted from a first voltage domain to a second voltage domain prior to being stored within the data storage device. The data storage device is powered by the second voltage domain. The apparatus further includes a circuit that is powered by the second voltage domain and that is responsive to data output by the data storage device.
    Type: Application
    Filed: August 12, 2011
    Publication date: February 14, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Christopher Edward Koob, Jen Tsung Lin, Manojkumar Pyla, Martin Saint-Laurent
  • Patent number: 8356145
    Abstract: A multi-stage multiplexing operation that includes combined selection and data alignment or data replication is disclosed. In a particular embodiment, a method includes performing a first stage of a multi-stage multiplexing operation. During the first stage, a first data source is selected from a first plurality of data sources. At least one of a first data alignment operation and a first data replication operation is also performed on first data from the selected first data source during the first stage.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: January 15, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Ajay A. Ingle, Jen Tsung Lin, Rahul R. Toley
  • Patent number: 7358197
    Abstract: The method for avoiding polysilicon film over etch abnormal includes cleaning a semiconductor substrate. A dielectric layer is formed on the substrate. Subsequently, a first silicon source gas at a first flow rate is next performed injecting into a reaction chamber to form a first polysilicon film over the dielectric layer. Successively, a second silicon source gas at a second flow rate is performed injecting into the reaction chamber to form a second polysilicon film over the first polysilicon film, wherein the second silicon source gas having a different growth rate than the first silicon source gas. A patterned photoresist layer is then formed on the second polysilicon film. After the patterned photoresist layer is formed, a dry etching process by way of using the patterned photoresist layer as a etching mask is performed to etch through in turn the second polysilicon film and the first polysilicon film till exposing to the dielectric layer. Finally, the photoresist layer is removed.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: April 15, 2008
    Assignee: United Microelectronics Corp.
    Inventors: Bruce Han, Jen-Tsung Lin, Kuo-Ping Huang
  • Publication number: 20050087510
    Abstract: The method for avoiding polysilicon film over etch abnormal includes cleaning a semiconductor substrate. A dielectric layer is formed on the substrate. Subsequently, a first silicon source gas at a first flow rate is next performed injecting into a reaction chamber to form a first polysilicon film over the dielectric layer. Successively, a second silicon source gas at a second flow rate is performed injecting into the reaction chamber to form a second polysilicon film over the first polysilicon film, wherein the second silicon source gas having a different growth rate than the first silicon source gas. A patterned photoresist layer is then formed on the second polysilicon film. After the patterned photoresist layer is formed, a dry etching process by way of using the patterned photoresist layer as a etching mask is performed to etch through in turn the second polysilicon film and the first polysilicon film till exposing to the dielectric layer. Finally, the photoresist layer is removed.
    Type: Application
    Filed: October 23, 2003
    Publication date: April 28, 2005
    Applicant: United Microelectronics Corp
    Inventors: Bruce Han, Jen-Tsung Lin, Kuo-Ping Huang
  • Patent number: 6136613
    Abstract: A method for recycling monitoring control wafers includes cleaning the wafers after performing a sheet resistance (Rs) measurement on a bare silicon monitoring control wafer of an ion implanter, and then converting the wafer into a recyclable control wafer. A recyclable control wafer for a thermal wave (TW) measurement of destruction can be obtained by forming a screen layer on the wafer, performing a TW measurement, performing ion implantation by the monitoring recipe, performing TW measurement again, performing ion drive-in to drive implanted ions into the deeper areas of the substrate, removing the screen layer, and then forming another screen layer on the wafer to put the wafer into the recycling process of a TW measurement.
    Type: Grant
    Filed: May 21, 1998
    Date of Patent: October 24, 2000
    Assignee: United Silicon Incorporated
    Inventors: Jen-Tsung Lin, Tsung-Hsien Han, Tang Yu
  • Patent number: 6065869
    Abstract: A method of in-line temperature monitoring. At least two control wafers and a monitor wafer are provided. A sacrificial layer is formed on each control wafer and the monitor wafer. Ions are implanted under a predetermined condition in the sacrificial layers. Thermal processes are performed on the control wafers at a higher and the lower limit of a target temperature to enable ions to move partially from the sacrificial layer to the control wafers. The sacrificial layers on the control wafers are subsequently removed. The sheet resistance of the control wafers is measured to obtain a first and the second resistance value, which respectively correspond to the first and second temperatures. A wafer and a monitor wafer are provided. A thermal process is performed on the monitor wafer and the wafer at the target temperature. The sacrificial layer of the monitor wafer is removed, and the sheet resistance of the monitor wafer is subsequently measured.
    Type: Grant
    Filed: July 19, 1999
    Date of Patent: May 23, 2000
    Assignee: United Silicon Incorporated
    Inventors: Jen-Tsung Lin, Da-Wen Shia, Tsung-Hsien Han, Eddie Chen
  • Patent number: 6014223
    Abstract: A method for determining the impurity concentration of impurity-doped polysilicon layers in semiconductor wafers is provided. Through experiments, it is found that the reflectivity of an impurity-doped polysilicon layer is nearly a regular function of the impurity concentration thereof. Accordingly, an impurity-doped polysilicon layer having an unknown impurity concentration can be determined by first measuring the reflectivity thereof by illuminating the impurity-doped polysilicon layer with light, and then using mapping transformation to find the corresponding value of impurity concentration of the impurity-doped polysilicon layer. This method can be used instead of the conventional thermal wave method that often result in having to discard the wafers due to the incapability of reliably determining the impurity concentration of the polysilicon layers formed on the semiconductor wafers.
    Type: Grant
    Filed: May 23, 1999
    Date of Patent: January 11, 2000
    Assignee: United Microelectronics Corp.
    Inventors: Jen-Tsung Lin, Kuen-Chu Chen, Keng-Yuan Wu, Eddie Chen
  • Patent number: 5882947
    Abstract: A method for probing the error of energy or dosage in the high-energy ion implantation is disclosed herein. The error source that is from either the energy of ion implantation or the dosage of ion implantation non-normal is decided via the thermal signal value and the thickness of the remained oxidation layer after etching step. The error source can be decided by using different decision standards for phosphorous ion implantation or boron ion implantation. The method comprises the steps as follow: a semiconductor silicon wafer is provided as a test wafer, and an oxidation layer is then formed over the test wafer. A high-energy ion implantation, such as phosphorous ion implantation or boron ion implantation is performed. The oxidation layer is etched via an etching process in a fixing etching time. The thickness of the remained oxidation layer after the etching process is probed. A thermal probe is applied to probe the thermal wave signal from the ion-implant-induced damage.
    Type: Grant
    Filed: August 5, 1997
    Date of Patent: March 16, 1999
    Assignee: United Microelectronics Corp.
    Inventors: Jen-Tsung Lin, Ben Chen, Eddie Chen