Patents by Inventor Jen Wang

Jen Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230187367
    Abstract: An electronic package structure includes a lower circuit pattern structure, an upper circuit pattern structure, a reflowable material and at least one core element. The upper circuit pattern structure is disposed above the lower circuit pattern structure. The reflowable material is disposed between the upper circuit pattern structure and the lower circuit pattern structure. The core element attaches to the reflowable material and is configured to inhibit displacement of the at least one core element during a reflow process.
    Type: Application
    Filed: December 10, 2021
    Publication date: June 15, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Jen WANG, Po-Jen CHENG, Fu-Yuan CHEN, Kao Hsin CHEN
  • Patent number: 11669046
    Abstract: A display device includes a light source, a waveguide element, a liquid crystal coupler, a first holographic optical element and a second holographic optical element. The light source is configured to emit light. The waveguide element is located above the light source. The liquid crystal coupler is located between the waveguide element and the light source. The first holographic optical element is located on a top surface of the waveguide element, in which the liquid crystal coupler is configured to change an incident angle that the light emits to the first holographic optical element. The second holographic optical element is located on the top surface of the waveguide element, and there is a first distance in a horizontal direction between the first holographic optical element and the second holographic optical element, in which the second holographic optical element is configured to diffract the light to the waveguide element below.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: June 6, 2023
    Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (SingZhen) Co., Ltd., Interface Optoelectronics (Wuxi) Co., Ltd., General Interface Solution Limited
    Inventors: Shih-Yu Wang, Chun-Ta Chen, Shiuan-Huei Lin, Zih-Fan Chen, Wan-Lin Li, Yi-Hsin Lin, Yu-Jen Wang, Wei-Cheng Cheng, Chang-Nien Mao
  • Publication number: 20230171556
    Abstract: The disclosure provides a method and a host for adjusting audio of speakers, and a computer readable medium. The method includes: controlling a far-field speaker to play a first audio signal; controlling an audio receiver to receive the first audio signal from the far-field speaker and accordingly positioning a speaker location of the far-field speaker; establishing a first hearing transfer function related to the far-filed speaker based on the speaker location of the far-filed speaker; controlling the far-field speaker to play a second audio signal based on a second hearing transfer function; controlling the audio receiver to receive the second audio signal and accordingly estimating a first reference hearing volume; obtaining a second reference hearing volume corresponding to a first near-field speaker; and adjusting a first volume of the far-field speaker based on the first reference hearing volume and the second reference hearing volume.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Applicant: HTC Corporation
    Inventors: Yen-Chieh Wang, Li-Hsun Chang, Sung Jen Wang, Chien-Hung Lin
  • Patent number: 11664094
    Abstract: A drug-screening system includes an encoding module, a candidate-drug generating module and a drug-ranking module. The encoding module is configured to encode a drug expression and at least one drug-ranking indicator to generate a first encoding variable. The candidate-drug generating module is configured to train a generative adversarial network according to the first encoding variable to generate a plurality of candidate drugs, wherein each of the candidate drugs has a generative drug expression and at least one generative drug-ranking indicator. The drug-ranking module is configured to rank strengths of the candidate drugs according to the generative drug-ranking indicator of each of the candidate drugs.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: May 30, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ci-Jie Lin, Chieh-Jen Hsiao, Chieh-Jen Wang
  • Publication number: 20230161224
    Abstract: An optical system is provided. The optical system includes a movable portion, a fixed portion, and a driving assembly. The movable portion is movable relative to the fixed portion. The driving assembly drives the movable portion to move relative to the fixed portion. The driving assembly is located between the movable portion and the fixed portion.
    Type: Application
    Filed: November 18, 2022
    Publication date: May 25, 2023
    Inventors: Ying-Jen WANG, Yi-Ho CHEN, Ko-Lun CHAO, Ya-Hsiu WU
  • Publication number: 20230135579
    Abstract: A graph-based natural language optimization method and an electronic apparatus are provided. The method is adapted for an electronic apparatus with a processor. In the method, an input sentence submitted by a user is received, and multiple domain-related entities are extracted from the input sentence. The domain-related entities are input to a graph database to analyze a connection relationship between the domain-related entities, and filling data is obtained from the graph database based on the connection relationship. The input sentence and the filling data are integrated via a natural language processing technology to generate an optimized natural language sentence.
    Type: Application
    Filed: December 14, 2021
    Publication date: May 4, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Chieh-Jen Wang, Chung-Jen Chiu
  • Publication number: 20230127889
    Abstract: An optical system is provided, including an optical module, a fixed part, a movable part for holding an optical module, and a flexible member. The flexible member movably connects the movable part to the fixed part to suppress the vibration of the optical system at a first frequency.
    Type: Application
    Filed: October 24, 2022
    Publication date: April 27, 2023
    Inventors: Ying-Jen WANG, Yi-Ho CHEN, Ya-Hsiu WU
  • Patent number: 11638089
    Abstract: A speaker module adapted to be disposed on a wearable device. The speaker module includes at least one driving unit and an enclosure. The driving unit is configured to produce sound. The enclosure contains the driving unit and has a front chamber and a rear chamber. The front chamber and the rear chamber are individually located at two opposite sides of the driving unit. The enclosure has a front opening, a first rear opening, and a second rear opening. The front opening communicates with the front chamber. The first rear opening and the second rear opening individually communicate with the rear chamber. A sum of sound outputted from the front opening, the first rear opening, and the second rear opening has directivity.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: April 25, 2023
    Assignee: HTC Corporation
    Inventors: Yen-Chieh Wang, Sung Jen Wang, Yu-Zhen He
  • Publication number: 20230122971
    Abstract: A force sensing device is mounted on a tool to sense force, particularly quasi-static and static forces. The force sensing device includes at least one a sensor. A piezoelectric element in the sensor includes a driving portion and a sensing portion. A first voltage is input to the driving portion to generate a vibration in the piezoelectric element and a second voltage in response to the vibration is output from the sensing portion. The second voltage output from the sensing portion is changed as the vibration in the piezoelectric element is suppressed by an external force acting on the force sensing device so variation of the second voltage can be used to measure the external force.
    Type: Application
    Filed: December 14, 2021
    Publication date: April 20, 2023
    Inventors: Yu-Jen Wang, Yu-Jan Lo, Ren-Yi Huang
  • Publication number: 20230120771
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Application
    Filed: December 15, 2022
    Publication date: April 20, 2023
    Inventors: Chao-Chang HU, Liang-Ting HO, Chen-Er HSU, Yi-Liang CHAN, Fu-Lai TSENG, Fu-Yuan WU, Chen-Chi KUO, Ying-Jen WANG, Wei-Han HSIA, Yi-Hsin TSENG, Wen-Chang LIN, Chun-Chia LIAO, Shou-Jen LIU, Chao-Chun CHANG, Yi-Chieh LIN, Shang-Yu HSU, Yu-Huai LIAO, Shih-Wei HUNG, Sin-Hong LIN, Kun-Shih LIN, Yu-Cheng LIN, Wen-Yen HUANG, Wei-Jhe SHEN, Chih-Shiang WU, Sin-Jhong SONG, Che-Hsiang CHIU, Sheng-Chang LIN
  • Publication number: 20230124933
    Abstract: An electronic package structure includes an electronic structure, a wiring structure, an electrical contact and a support layer. The wiring structure is located over the electronic structure. The electrical contact connects the wiring structure and the electronic structure. The support layer is disposed around the electrical contact and has a surface facing the electrical contact. The surface includes at least one inflection point in a cross-sectional view.
    Type: Application
    Filed: October 14, 2021
    Publication date: April 20, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Jen WANG, Po-Jen CHENG, Fu-Yuan CHEN
  • Publication number: 20230124000
    Abstract: At least some embodiments of the present disclosure relate to an electronic package structure. The electronic package structure includes an electronic structure, a wiring structure disposed over the electronic structure, a bonding element connecting the wiring structure and the electronic structure, and a reinforcement element attached to the wiring structure. An elevation difference between a highest point and a lowest point of a surface of the wiring structure facing the electronic structure is less than a height of the bonding element.
    Type: Application
    Filed: October 14, 2021
    Publication date: April 20, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Jen WANG, Po-Jen CHENG, Fu-Yuan CHEN, Yi-Hsin CHENG
  • Patent number: 11630282
    Abstract: An optical element driving mechanism includes a fixed portion, a movable portion, a driving assembly, and a circuit assembly. The movable portion is connected to the optical element and is movable relative to the fixed portion. The driving assembly drives the movable portion to move relative to the fixed portion. The circuit assembly is connected to the driving assembly. The driving assembly is electrically connected to an external circuit via the circuit assembly.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: April 18, 2023
    Assignee: TDK TAIWAN CORP.
    Inventors: Yi-Ho Chen, Chen-Hsin Huang, Chao-Chang Hu, Chen-Chi Kuo, Ying-Jen Wang, Ya-Hsiu Wu, Sin-Jhong Song, Che-Hsiang Chiu, Kuen-Wang Tsai, Mao-Kuo Hsu, Tun-Ping Hsueh, I-Hung Chen, Chun-Chia Liao, Wei-Zhong Luo, Wen-Chang Lin
  • Patent number: 11632888
    Abstract: An RRAM structure includes a substrate. The substrate is divided into a memory cell region and a logic device region. A metal plug is disposed within the memory cell region. An RRAM is disposed on and contacts the metal plug. The RRAM includes a top electrode, a variable resistive layer, and a bottom electrode. The variable resistive layer is disposed between the top electrode and the bottom electrode. The variable resistive layer includes a first bottom surface. The bottom electrode includes a first top surface. The first bottom surface and the first top surface are coplanar. The first bottom surface only overlaps and contacts part of the first top surface.
    Type: Grant
    Filed: January 9, 2022
    Date of Patent: April 18, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wen-Jen Wang, Chun-Hung Cheng, Chuan-Fu Wang
  • Patent number: 11631802
    Abstract: A plurality of conductive via connections are fabricated on a substrate located at positions where MTJ devices are to be fabricated, wherein a width of each of the conductive via connections is smaller than or equivalent to a width of the MTJ devices. The conductive via connections are surrounded with a dielectric layer having a height sufficient to ensure that at the end of a main MTJ etch, an etch front remains in the dielectric layer surrounding the conductive via connections. Thereafter, a MTJ film stack is deposited on the plurality of conductive via connections surrounded by the dielectric layer. The MTJ film stack is etched using an ion beam etch process (IBE), etching through the MTJ film stack and into the dielectric layer surrounding the conductive via connections to form the MTJ devices wherein by etching into the dielectric layer, re-deposition on sidewalls of the MTJ devices is insulating.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: April 18, 2023
    Assignee: Headway Technologies, Inc.
    Inventors: Vignesh Sundar, Yi Yang, Dongna Shen, Zhongjian Teng, Jesmin Haq, Sahil Patel, Yu-Jen Wang, Tom Zhong
  • Patent number: 11626525
    Abstract: A package structure is provided. The package structure includes a substrate, a sensor device, an encapsulant and a signal blocking structure. The substrate has a signal passing area. The sensor device is disposed over the substrate. The sensor device has a first surface, a second surface opposite to the first surface and a sensing area located at the second surface. The second surface of the sensor device faces the substrate. The encapsulant covers the sensor device and the substrate. The signal blocking structure extends from the substrate into the encapsulant.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: April 11, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chun Yu Ko, Tsu-Hsiu Wu, Meng-Jen Wang
  • Publication number: 20230104397
    Abstract: A selective EMI shielding structure for a semiconductor package and a method of fabrication thereof is disclosed. The semiconductor package, comprising: a substrate having a first face; at least one first electronic component mounted adjacent to a first region of the first face; a least one second electronic component mounted adjacent to a second region of the first face; and an encapsulant disposed over the first and the second electronic components, wherein the encapsulant covers directly over the first electronic component, and wherein the encapsulant covers the second electronic component through a layer of conductive material.
    Type: Application
    Filed: October 1, 2021
    Publication date: April 6, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Meng-Jen WANG, Chien-Yuan TSENG, Hung Chen KUO, Ying-Hao WEI, Chia-Feng HSU, Yuan-Long CHIAO
  • Publication number: 20230099326
    Abstract: A method for forming an integrated circuit layout including at least two standard cells having different cell heights is disclosed. The standard cells respectively have a well boundary to divide a PMOS region and an NMOS region. The standard cells are abutted side by side along their side edges in a way that the well boundaries of the cells are aligned along the row direction. The power rail and the ground rail of one of the standard cells are extended in width or length to connect to the power rail and the ground rail of the other one of the standard cells.
    Type: Application
    Filed: July 21, 2022
    Publication date: March 30, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chien-Hung Chen, Ruei-Yau Chen, Wei-Jen Wang, Kun-Yuan Wu, Chien-Fu Chen, Chen-Hsien Hsu
  • Publication number: 20230097189
    Abstract: A method for forming an integrated circuit layout including at least two standard cells having different cell heights is disclosed. The standard cells respectively have a well boundary to divide a PMOS region and an NMOS region. The standard cells are abutted side by side along their side edges in a way that the well boundaries of the cells are aligned along the row direction. The power rail and the ground rail of one of the standard cells are shifted to align and connect to the power rail and the ground rail of the other one of the standard cells.
    Type: Application
    Filed: July 19, 2022
    Publication date: March 30, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chien-Hung Chen, Ruei-Yau Chen, Wei-Jen Wang, Kun-Yuan Wu, Chien-Fu Chen, Chen-Hsien Hsu
  • Publication number: 20230096645
    Abstract: A layout includes a first and a second standard cells abutting along a boundary line. The first cell includes first fins. An edge of the first fins closest to and away from the boundary line by a distance D1. A first gate line over-crossing the first fins protrudes from the edge by a length L1. The second cell includes second fins. An edge of the second fins closest to and away from the boundary line by a distance D2. A second gate line over-crossing the second fins protrudes from the edge by a length L2. Two first dummy gate lines at two sides of the first fins and two second dummy lines at two sides of the second fins are respectively away from the boundary line by a distance S. The lengths L1 and L2, the distances S, D1 and D2 have the relationships: L1?D1?S, L2?D2?S, and D1?D2.
    Type: Application
    Filed: April 8, 2022
    Publication date: March 30, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ruei-Yau Chen, Wei-Jen Wang, Kun-Yuan Wu, Chien-Fu Chen, Chen-Hsien Hsu