Patents by Inventor Jen-Wei Kuo

Jen-Wei Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240389240
    Abstract: An embodiment composite material for semiconductor package mount applications may include a first component including a tin-silver-copper alloy and a second component including a tin-bismuth alloy or a tin-indium alloy. The composite material may form a reflowed bonding material having a room temperature tensile strength in a range from 80 MPa to 100 MPa when subjected to a reflow process. The reflowed bonding material may include a weight fraction of bismuth that is in a range from approximately 4% to approximately 15%. The reflowed bonding material may an alloy that is solid solution strengthened by a presence of bismuth or indium that is dissolved within the reflowed bonding material or a solid solution phase that includes a minor component of bismuth dissolved within a major component of tin. In some embodiments, the reflowed bonding material may include intermetallic compounds formed as precipitates such as Ag3Sn and/or Cu6Sn5.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 21, 2024
    Inventors: Chao-Wei Chiu, Chih-Chiang Tsao, Jen-Jui Yu, Hsuan-Ting Kuo, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Publication number: 20240371959
    Abstract: A method includes forming a first fin structure and a second fin structure protruding from a substrate, forming a dielectric fin between the first fin structure and the second fin structure, recessing the dielectric fin to form a trench between the first fin structure and the second fin structure, and depositing a first dielectric layer on sidewall surfaces of the trench and on a top surface of the recessed dielectric fin. After the depositing the first dielectric layer, a second dielectric layer is deposited in the trench. The method further includes depositing a third dielectric layer to cap the second dielectric layer in the trench, and forming a gate structure on the first fin structure, the second fin structure, and the third dielectric layer.
    Type: Application
    Filed: July 17, 2024
    Publication date: November 7, 2024
    Inventors: Chih-Chung Chang, Sung-En Lin, Chung-Ting Ko, You-Ting Lin, Yi-Hsiu Liu, Po-Wei Liang, Jiun-Ming Kuo, Yung-Cheng Lu, Chi On Chui, Yuan-Ching Peng, Jen-Hong Chang
  • Publication number: 20240350289
    Abstract: An opening is formed through a dielectric material layer to physically expose a top surface of a conductive material portion in, or over, a substrate. A metallic nitride liner is formed on a sidewall of the opening and on the top surface of the conductive material portion. A metallic adhesion layer including an alloy of copper and at least one transition metal that is not copper is formed on an inner sidewall of the metallic nitride liner. A copper fill material portion may be formed on an inner sidewall of the metallic adhesion layer. The metallic adhesion layer is thermally stable, and remains free of holes during subsequent thermal processes, which may include reflow of the copper fill material portion. An additional copper fill material portion may be optionally deposited after a reflow process.
    Type: Application
    Filed: June 28, 2024
    Publication date: October 24, 2024
    Inventors: Cheng-Lun TSAI, Huei-Wen HSIEH, Chun-Sheng CHEN, Kai-Shiang KUO, Jen-Wei LIU, Cheng-Hui WENG, Chun-Chien LIN, Hung-Wen SU
  • Patent number: 12113113
    Abstract: A semiconductor device includes a pair of fin structures on a semiconductor substrate, each including a vertically stacked plurality of channel layers, a dielectric fin extending in parallel to and between the fin structures, and a gate structure on and extending perpendicularly to the fin structures, the gate structure engaging with the plurality of channel layers. The dielectric fin includes a fin bottom and a fin top over the fin bottom. The fin bottom has a top surface extending above a bottom surface of a topmost channel layer. The fin top includes a core and a shell, the core having a first dielectric material, the shell surrounding the core and having a second dielectric material different from the first dielectric material.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: October 8, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Chung Chang, Sung-En Lin, Chung-Ting Ko, You-Ting Lin, Yi-Hsiu Liu, Po-Wei Liang, Jiun-Ming Kuo, Yung-Cheng Lu, Chi On Chui, Yuan-Ching Peng, Jen-Hong Chang
  • Patent number: 12080594
    Abstract: An opening is formed through a dielectric material layer to physically expose a top surface of a conductive material portion in, or over, a substrate. A metallic nitride liner is formed on a sidewall of the opening and on the top surface of the conductive material portion. A metallic adhesion layer including an alloy of copper and at least one transition metal that is not copper is formed on an inner sidewall of the metallic nitride liner. A copper fill material portion may be formed on an inner sidewall of the metallic adhesion layer. The metallic adhesion layer is thermally stable, and remains free of holes during subsequent thermal processes, which may include reflow of the copper fill material portion. An additional copper fill material portion may be optionally deposited after a reflow process.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: September 3, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Cheng-Lun Tsai, Huei-Wen Hsieh, Chun-Sheng Chen, Kai-Shiang Kuo, Jen-Wei Liu, Cheng-Hui Weng, Chun-Chieh Lin, Hung-Wen Su
  • Publication number: 20240272537
    Abstract: An illumination system configured to provide an illumination light is provided. The illumination system includes a light source, a light-homogenizing device, and a light-homogenizing element. The light source includes multiple light-emitting units, and the light-emitting units emit multiple light beams respectively. The light-homogenizing device includes a micro-lens-array element. The micro-lens-array element includes multiple micro lenses, and each of the light beams irradiates at least two of the micro lenses. The light beams are totally overlapped, non-overlapped, or partially overlapped with each other before being incident on the light-homogenizing device, and overlapped with each other on an incident surface of the light-homogenizing element. A projection device is also provided.
    Type: Application
    Filed: February 5, 2024
    Publication date: August 15, 2024
    Applicant: Coretronic Corporation
    Inventors: Chun-Hsin Lu, Jen-Wei Kuo, Wen-Chieh Chung
  • Publication number: 20240069425
    Abstract: An illumination system including two light source modules, two light guiding modules, a first reflector, and a light homogenization element is provided. The two light guiding modules are respectively disposed on transmission paths of light beams generated by the two light source modules to generate two guiding light beams. One of the guiding light beams is reflected to the light homogenization element by the first reflector. The other of the guiding light beams is directly transmitted to the light homogenization element. The guiding light beams are emitted from the light homogenization element and form an illumination light beam. A projection apparatus is also provided.
    Type: Application
    Filed: August 24, 2023
    Publication date: February 29, 2024
    Applicant: Coretronic Corporation
    Inventors: Chun-Hsin Lu, Jen-Wei Kuo, Wen-Chieh Chung
  • Publication number: 20240073378
    Abstract: A projection apparatus including a light source module, an eccentric-collimating lens, a prism lens group, a light valve and a projection lens is provided. The light source module is configured to provide an illumination light beam. The eccentric-collimating lens is disposed between the light sources and the light valve on a transmission path of the illumination light beam. The light valve is configured to convert the illumination light beam into an image light beam. The projection lens is configured to project the image light beam out of the projection apparatus. A first included angle between a first transmission direction of the illumination light beam incident on the eccentric-collimating lens and a central axis of the eccentric-collimating lens is greater than 0. The first transmission direction and a second transmission direction of the image beam exiting from the light valve are perpendicular to each other.
    Type: Application
    Filed: August 24, 2023
    Publication date: February 29, 2024
    Applicant: Coretronic Corporation
    Inventors: Chun-Hsin Lu, Jen-Wei Kuo, Wen-Chieh Chung
  • Patent number: 11837900
    Abstract: A battery capacity representation method for a computer system, is disclosed. The computer system includes a specific absorption rate (SAR) sensor, a battery module and a light-emitting diode (LED) module, and the battery capacity representation method includes performing an external environment sensing by the SAR sensor to determine whether a triggering condition is satisfied; sensing a battery capacity of the battery module when the triggering condition is satisfied; and determining a representation status of the LED module according to the battery capacity.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: December 5, 2023
    Assignee: Wistron Corporation
    Inventors: Chih-Teng Shen, Liang-Fang Wan, Jen-Wei Kuo
  • Publication number: 20220376533
    Abstract: A battery capacity representation method for a computer system, is disclosed. The computer system includes a specific absorption rate (SAR) sensor, a battery module and a light-emitting diode (LED) module, and the battery capacity representation method includes performing an external environment sensing by the SAR sensor to determine whether a triggering condition is satisfied; sensing a battery capacity of the battery module when the triggering condition is satisfied; and determining a representation status of the LED module according to the battery capacity.
    Type: Application
    Filed: July 26, 2021
    Publication date: November 24, 2022
    Applicant: Wistron Corporation
    Inventors: Chih-Teng Shen, Liang-Fang Wan, Jen-Wei Kuo
  • Publication number: 20210208493
    Abstract: A projection device including a light combining system, an illumination system, and a projection lens is provided. The light combining system is configured to provide a combined beam. The illumination system is disposed on a transmission path of the combined beam and configured to receive the combined beam to generate an illumination beam. At least one light valve is disposed on a transmission path of the illumination beam and converts the illumination beam into an image beam. The projection lens is disposed on a transmission path of the image beam and configured to project the image beam out of the projection device. The light combining system is located in a first layer space. The at least one light valve is located in a second layer space. The first layer space is different from the second layer space. The first layer and second layer spaces overlap in the gravitational direction.
    Type: Application
    Filed: January 5, 2021
    Publication date: July 8, 2021
    Applicant: Coretronic Corporation
    Inventors: Wen-Chieh Chung, Jen-Wei Kuo, Tsung-Hsin Liao
  • Patent number: 10354380
    Abstract: A method to characterize shape variations in brain ventricles during embryonic growth in mammals, the method including extracting a brain ventricle skeleton from one or more images, calculating a volume profile for the skeleton using the extracted images, partitioning the brain ventricle based on the volume profile along the skeleton, the brain ventricle being partitioned into two lateral ventricles and a main ventricle, the main ventricle being further partitioned into three sub regions, determining volume vectors of the two lateral ventricles and the three sub regions, computing a means square error between the determined computed volume vectors and a pretrained mean volume vector of embryos during different gestational stages, and classifying the embryo to the gestational stage having the lowest mean square error.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: July 16, 2019
    Assignees: Riverside Research Institute, New York University
    Inventors: Jen-wei Kuo, Jonathan Mamou, Jeffrey A. Ketterling, Orlando Aristizabal, Daniel H. Turnbull, Yao Wang
  • Patent number: 10157466
    Abstract: A method to segment images that contain multiple objects in a nested structure including acquiring an image; defining the multiple objects by layers, each layer corresponding to one region, where a region contains an innermost object and all the objects nested within the innermost object; stacking the layers in an order of the nested structure of the multiple objects, the stack of layers having at least a top layer and a bottom layer; extending each layer with padded nodes; connecting the top layer to a sink and the bottom layer to a source, wherein each intermediate layer between the top layer and the bottom layer are connected only to the adjacent layer by undirected links; and measuring a boundary length for each layer.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: December 18, 2018
    Assignees: Riverside Research Institute, New York University
    Inventors: Jen-wei Kuo, Jonathan Mamou, Xuan Zhao, Jeffrey A. Ketterling, Orlando Aristizabal, Daniel H. Turnbull, Yao Wang
  • Patent number: 10140708
    Abstract: A method to characterize shape variations in brain ventricles during embryonic growth in mammals, the method including extracting a brain ventricle skeleton from one or more images, calculating a volume profile for the skeleton using the extracted images, partitioning the brain ventricle based on the volume profile along the skeleton, the brain ventricle being partitioned into two lateral ventricles and a main ventricle, the main ventricle being further partitioned into three sub regions, determining volume vectors of the two lateral ventricles and the three sub regions, computing a means square error between the determined computed volume vectors and a pretrained mean volume vector of embryos during different gestational stages, and classifying the embryo to the gestational stage having the lowest mean square error.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: November 27, 2018
    Assignee: Riverside Research Institute
    Inventors: Jen-wei Kuo, Jonathan Mamou, Jeffrey A. Ketterling, Orlando Aristizabal, Daniel H. Turnbull, Yao Wang
  • Publication number: 20180336681
    Abstract: A method to characterize shape variations in brain ventricles during embryonic growth in mammals, the method including extracting a brain ventricle skeleton from one or more images, calculating a volume profile for the skeleton using the extracted images, partitioning the brain ventricle based on the volume profile along the skeleton, the brain ventricle being partitioned into two lateral ventricles and a main ventricle, the main ventricle being further partitioned into three sub regions, determining volume vectors of the two lateral ventricles and the three sub regions, computing a means square error between the determined computed volume vectors and a pretrained mean volume vector of embryos during different gestational stages, and classifying the embryo to the gestational stage having the lowest mean square error.
    Type: Application
    Filed: July 9, 2018
    Publication date: November 22, 2018
    Applicants: Riverside Research Institute, New York University
    Inventors: Jen-wei Kuo, Jonathan Mamou, Jeffrey A. Ketterling, Orlando Aristizabal, Daniel H. Turnbull, Yao Wang
  • Publication number: 20170213340
    Abstract: A method to characterize shape variations in brain ventricles during embryonic growth in mammals, the method including extracting a brain ventricle skeleton from one or more images, calculating a volume profile for the skeleton using the extracted images, partitioning the brain ventricle based on the volume profile along the skeleton, the brain ventricle being partitioned into two lateral ventricles and a main ventricle, the main ventricle being further partitioned into three sub regions, determining volume vectors of the two lateral ventricles and the three sub regions, computing a means square error between the determined computed volume vectors and a pretrained mean volume vector of embryos during different gestational stages, and classifying the embryo to the gestational stage having the lowest mean square error.
    Type: Application
    Filed: January 23, 2017
    Publication date: July 27, 2017
    Applicants: Riverside Research Institute, New York University
    Inventors: Jen-wei Kuo, Jonathan Mamou, Jeffrey A. Ketterling, Orlando Aristizabal, Daniel H. Turnbull, Yao Wang
  • Publication number: 20170213349
    Abstract: A method to segment images that contain multiple objects in a nested structure including acquiring an image; defining the multiple objects by layers, each layer corresponding to one region, where a region contains an innermost object and all the objects nested within the innermost object; stacking the layers in an order of the nested structure of the multiple objects, the stack of layers having at least a top layer and a bottom layer; extending each layer with padded nodes; connecting the top layer to a sink and the bottom layer to a source, wherein each intermediate layer between the top layer and the bottom layer are connected only to the adjacent layer by undirected links; and measuring a boundary length for each layer.
    Type: Application
    Filed: January 23, 2017
    Publication date: July 27, 2017
    Applicants: Riverside Research Institute, New York University
    Inventors: Jen-wei Kuo, Jonathan Mamou, Xuan Zhao, Jeffrey A. Ketterling, Orlando Aristizabal, Daniel H. Turnbull, Yao Wang
  • Publication number: 20150127796
    Abstract: When performing resource management between different service providers, a first interface and a second interface are provided simultaneously on an electronic device for connecting to a first service provider and a second service provider, respectively. The first interface is arranged to display the resource list of the first service provider as icons, and the second interface is arranged to display the resource list of the second service provider as icons. When a specific icon on one of the interfaces is selected and then dragged to the other interface, resource transmission between the first and second service providers may be activated.
    Type: Application
    Filed: April 23, 2014
    Publication date: May 7, 2015
    Applicant: Synology Incorporated
    Inventors: Shi-Shiuan Kao, Chih-Kuang Huang, Jen-Wei Kuo
  • Publication number: 20150121271
    Abstract: A method of managing icons is used on a screen of an electronic device which displays a first icon and a second icon. While dragging the first icon, the first and second icons are displayed on a first region of the screen and a group symbol is displayed on a second region of the screen. The first icon is dragged onto the group symbol and then released for creating a new group which contains the first icon. A group icon associated with the new group is then displayed on the second region of the screen.
    Type: Application
    Filed: May 2, 2014
    Publication date: April 30, 2015
    Applicant: Synology Incorporated
    Inventors: Chih-Kuang Huang, Shi-Shiuan Kao, Jen-Wei Kuo, Yi-Yu Lin, Hsing-Hsing Hung
  • Patent number: 8938799
    Abstract: A unified security management system and related apparatus and methods for protecting endpoint computing systems and managing, providing, and obtaining security functions is described. Various forms of the system, apparatus and methods may be used for improved security, security provisioning, security management, and security infrastructure.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: January 20, 2015
    Inventor: Jen-Wei Kuo