Abstract: An electronic device may include an electronic display having display pixels and pixel drive circuitry that selects an analog voltage for the display pixels based on a first gray-to-voltage mapping and display image data that is based on compensated image data. The electronic display may also include image processing circuitry that receives input image data in a gray level domain, converts the input image data to a voltage domain based on a second gray-to-voltage mapping different from the first, and applies voltage compensations to voltage levels of the input image data in the voltage domain to generate compensated voltage data. The image processing circuitry may also convert the compensated voltage data from the voltage domain to the gray level domain to generate the compensated image data based on a voltage-to-gray mapping that is the inverse of the first gray-to-voltage mapping.

Abstract: A fixing mechanism and a computer chassis are provided. The fixing mechanism includes a main member and a first locking member. The first locking member includes a fixing portion, a support portion and a stop portion. The fixing portion includes a first part and a second part, and two ends of the first part are respectively connected to the main member and the second part. The support portion is connected to the fix portion, and the second part and the support portion are respectively located on two opposite surfaces of the first part. The stop portion is connected to the support portion, and located on a bottom surface of the support portion. An electronic device is assembled in the main member, and the first locking member is locked to a circuit board of a computer chassis to fix the fixing mechanism in a casing of the computer chassis.

Abstract: A fixing mechanism and a computer chassis are provided. The fixing mechanism includes a main member and a first locking member. The first locking member includes a fixing portion, a support portion and a stop portion. The fixing portion includes a first part and a second part, and two ends of the first part are respectively connected to the main member and the second part. The support portion is connected to the fix portion, and the second part and the support portion are respectively located on two opposite surfaces of the first part. The stop portion is connected to the support portion, and located on a bottom surface of the support portion. An electronic device is assembled in the main member, and the first locking member is locked to a circuit board of a computer chassis to fix the fixing mechanism in a casing of the computer chassis.

Abstract: An analog-to-digital converter includes comparator modules and an encoder module. Each of the comparator modules is configured to compare a reference voltage with an input signal according to a first clock signal to generate a first comparison signal and a second comparison signal, and to generate a detection signal according to a second clock signal, the first comparison signal, and the second comparison signal. A delay duration is present between the first clock signal and the second clock signal. The encoder module is configured to generate a first bit of digital data according to the first comparison signals from the comparator modules, and to generate a second bit of the digital data according to the detection signals from the comparator modules and the first bit.

Abstract: A temperature measurement circuit includes a sensing unit and a temperature translation unit. The sensing unit is arranged for generating a positive temperature coefficient characteristic and a negative temperature coefficient characteristic according to a temperature. The temperature translation unit is coupled to the sensing unit, and is arranged for generating a measured temperature according to the positive temperature coefficient characteristic and the negative temperature coefficient characteristic.

Abstract: A method to reduce the integral non-linearity (INL) of a digital-to-analog converter (DAC) and a DAC implementing said method are disclosed. The method in this invention is a pseudo dynamic element matching (PDEM) method. Compared with a prior art, the method of this invention provides a better performance in glitch. Compared with another prior art, the method of this invention also guarantees that DEM will not fail even if the input digital code remains constant.

Abstract: A method to reduce the integral non-linearity (INL) of a digital-to-analog converter (DAC) and a DAC implementing said method are disclosed. The method in this invention is a pseudo dynamic element matching (PDEM) method. Compared with a prior art, the method of this invention provides a better performance in glitch. Compared with another prior art, the method of this invention also guarantees that DEM will not fail even if the input digital code remains constant.

Abstract: A temperature measurement circuit includes a sensing unit and a temperature translation unit. The sensing unit is arranged for generating a positive temperature coefficient characteristic and a negative temperature coefficient characteristic according to a temperature. The temperature translation unit is coupled to the sensing unit, and is arranged for generating a measured temperature according to the positive temperature coefficient characteristic and the negative temperature coefficient characteristic.