Patents by Inventor Jen-Wen Wan

Jen-Wen Wan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8576366
    Abstract: A pixel array includes pixel sets. Each pixel set includes a first and second scan lines arranged in parallel on a substrate, a data line not parallel to the first and second scan lines, a first active device electrically connecting the first scan line and the data line, a second active device electrically connecting the second scan line and the data line, a first pixel electrode electrically connecting the first active device, a second pixel electrode electrically connecting the second active device, and an auxiliary electrode pattern that includes a connecting portion and a first and second branch portions. A gap is between the first and second pixel electrodes. The connecting portion underneath the gap between the first and second pixel electrodes partially overlaps the first and second pixel electrodes. The first and second branch portions connect the connecting portion and partially overlap the first and second pixel electrodes, respectively.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: November 5, 2013
    Assignee: Au Optronics Corporation
    Inventors: Hui-Ting Hsu, Chu-Yu Liu, Yu-Chieh Kuo, I-Chun Chen, Jen-Wen Wan, Chou-Chin Wu
  • Publication number: 20120056207
    Abstract: A pixel array includes pixel sets. Each pixel set includes a first and second scan lines arranged in parallel on a substrate, a data line not parallel to the first and second scan lines, a first active device electrically connecting the first scan line and the data line, a second active device electrically connecting the second scan line and the data line, a first pixel electrode electrically connecting the first active device, a second pixel electrode electrically connecting the second active device, and an auxiliary electrode pattern that includes a connecting portion and a first and second branch portions. A gap is between the first and second pixel electrodes. The connecting portion underneath the gap between the first and second pixel electrodes partially overlaps the first and second pixel electrodes. The first and second branch portions connect the connecting portion and partially overlap the first and second pixel electrodes, respectively.
    Type: Application
    Filed: April 1, 2011
    Publication date: March 8, 2012
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Hui-Ting Hsu, Chu-Yu Liu, Yu-Chieh Kuo, I-Chun Chen, Jen-Wen Wan, Chou-Chin Wu
  • Patent number: 7514713
    Abstract: A liquid crystal display panel including an active device array substrate, a second substrate, a sealant, and a liquid crystal layer is provided. The active device array substrate has a display area and a peripheral area surrounding the display area, and includes a first substrate, pixels, signal lines, floating lines, and a common circuit layer. The signal lines are electrically connected with the pixels. The floating lines are disposed in fan-out areas of the peripheral area. Each of the floating lines is aligned with one of the signal lines respectively. The common circuit layer is disposed on an area of the peripheral area outside the fan-out areas. An overall thickness of the floating line and the signal line aligned therewith is equal to a thickness of the common circuit layer. The sealant covers the floating lines, a part of the signal lines and the common circuit layer.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: April 7, 2009
    Assignee: Au Optronics Corporation
    Inventors: Shu-Fen Tsai, Chen-Yu Tu, Jen-Wen Wan
  • Publication number: 20080067510
    Abstract: A liquid crystal display panel including an active device array substrate, a second substrate, a sealant, and a liquid crystal layer is provided. The active device array substrate has a display area and a peripheral area surrounding the display area, and includes a first substrate, pixels, signal lines, floating lines, and a common circuit layer. The signal lines are electrically connected with the pixels. The floating lines are disposed in fan-out areas of the peripheral area. Each of the floating lines is aligned with one of the signal lines respectively. The common circuit layer is disposed on an area of the peripheral area outside the fan-out areas. An overall thickness of the floating line and the signal line aligned therewith is equal to a thickness of the common circuit layer. The sealant covers the floating lines, a part of the signal lines and the common circuit layer.
    Type: Application
    Filed: December 19, 2006
    Publication date: March 20, 2008
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Shu-Fen Tsai, Chen-Yu Tu, Jen-Wen Wan