Patents by Inventor Jen-Yu Lee
Jen-Yu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240373870Abstract: A gel composition includes an oleogel dispersed within an aqueous gel which is continuous phase. the oleogel comprising either a plant-based oil in liquid state at room temperature and a wax, or a plant-based oil in non-liquid state at room temperature. and the aqueous gel comprising water and at least one of protein and polysaccharide. The present disclosure also discloses an edible composition comprising the gel composition, and the use of this edible composition as an animal fat substitute. The present disclosure further discloses a food product comprising the edible composition. Methods for making the gel composition are also disclosed.Type: ApplicationFiled: July 8, 2022Publication date: November 14, 2024Inventors: Michelle C Lee, Jen-Yu Huang
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Patent number: 12129169Abstract: Provided is a semi-finished product of an electronic device, including a substrate, a sensing module, and a lid. The substrate has a first surface and a second surface opposite to each other. The sensing module is disposed on the first surface. The lid is disposed on the first surface and forms a first cavity together with the substrate. An electronic device is also provided.Type: GrantFiled: November 26, 2021Date of Patent: October 29, 2024Assignee: Merry Electronics Co., Ltd.Inventors: Jen-Yi Chen, Yueh-Kang Lee, Kai-Yu Jiang
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Patent number: 12118653Abstract: A system, method, and computer program product are provided for reducing GPU load by programmatically controlling shading rates in computer graphics. GPU load may be reduced by applying different shading rates to different screen regions. By reading the depth buffer of previous frames and performing image processing, thresholds may be calculated that control the shading rates. The approach may be run on any platform that supports VRS hardware and primitive- or image-based VRS. The approach may be applied on a graphics driver installed on a client device, in a firmware layer between hardware and a driver, in a software layer between a driver and an application, or in hardware on the client device. The approach is flexible and adaptable and calculates and sets the variable rate shading based on the graphics generated by an application without requiring the application developer to manually set variable rate shading.Type: GrantFiled: September 14, 2022Date of Patent: October 15, 2024Assignee: MediaTek Inc.Inventors: Po-Yu Huang, Shih-Chin Lin, Jen-Jung Cheng, Tu-Hsiu Lee
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Publication number: 20240311542Abstract: A rectilinear-block placement method includes disposing a first sub-block of each flexible block on a layout area of a chip canvas according to a reference position, generating an edge-depth map relative to first sub-blocks of flexible blocks on the layout area, predicting positions of second sub-blocks of the flexible blocks with depth values on the edge-depth map by a machine learning model, and positioning the second sub-blocks on the layout area according to the predicted positions of the second sub-blocks of the flexible blocks.Type: ApplicationFiled: December 27, 2023Publication date: September 19, 2024Applicant: MEDIATEK INC.Inventors: Jen-Wei Lee, Yi-Ying Liao, Te-Wei Chen, Kun-Yu Wang, Sheng-Tai Tseng, Ronald Kuo-Hua Ho, Bo-Jiun Hsu, Wei-Hsien Lin, Chun-Chih Yang, Chih-Wei Ko, Tai-Lai Tung
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Publication number: 20240303408Abstract: The application discloses a method and a system for shaping flexible blocks on a chip canvas in an integrated circuit design. An input is received describing geometric features of flexible blocks. A set of flexible blocks are generated based on the input. Obtained block areas of the set of flexible blocks are computed. Whether the set of flexible blocks are legal is determined based on determining whether area differences between the obtained block areas and a plurality of required areas for the set of flexible blocks meet a requirement. The set of flexible blocks are updated until the set of flexible blocks are all legal.Type: ApplicationFiled: March 7, 2024Publication date: September 12, 2024Inventors: Kun-Yu WANG, Sheng-Tai TSENG, Yi-Ying LIAO, Jen-Wei LEE, Ronald Kuo-Hua HO, Bo-Jiun HSU, Te-Wei CHEN, Chun-Chih YANG, Tai-Lai TUNG
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Publication number: 20240282571Abstract: A method of manufacturing a semiconductor device includes depositing a dielectric layer over a substrate, performing a first patterning to form an opening in the dielectric layer, and depositing an oxide film over and contacting the dielectric layer and within the opening in the dielectric layer. The oxide film is formed from multiple precursors that are free of O2, and depositing the oxide film includes forming a plasma of a first precursor of the multiple precursors.Type: ApplicationFiled: April 18, 2024Publication date: August 22, 2024Inventors: Wan-Lin Tsai, Jung-Hau Shiu, Ching-Yu Chang, Jen Hung Wang, Shing-Chyang Pan, Tze-Liang Lee
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Publication number: 20240249942Abstract: A method for manufacturing an integrated circuit includes patterning a plurality of photomask layers over a substrate, partially backfilling the patterned plurality of photomask layers with a first material using atomic layer deposition, completely backfilling the patterned plurality of photomask layers with a second material using atomic layer deposition, removing the plurality of photomask layers to form a masking structure comprising at least one of the first and second materials, and transferring a pattern formed by the masking structure to the substrate and removing the masking structure. The first material includes a silicon dioxide, silicon carbide, or carbon material, and the second material includes a metal oxide or metal nitride material.Type: ApplicationFiled: March 5, 2024Publication date: July 25, 2024Inventors: Ching-Yu Chang, Jung-Hau Shiu, Jen Hung Wang, Tze-Liang Lee
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Patent number: 9331107Abstract: A fabrication method of a pixel structure includes the following steps. A first metal layer is patterned to form a source electrode and a drain electrode. A semiconductor material layer is patterned to form a channel layer and a pixel pattern. A first insulation layer is formed to cover the channel layer, the source electrode, the drain electrode and the pixel pattern. A gate electrode is formed on the first insulation layer located above the channel layer. A second insulation layer is formed to cover the gate electrode and the first insulation layer. A pixel opening is formed in the first insulation layer and the second insulation layer to expose a partial region of the pixel pattern. The partial region of the pixel pattern exposed by the pixel opening is modified so as to form a pixel electrode electrically connected to the drain electrode.Type: GrantFiled: May 22, 2015Date of Patent: May 3, 2016Assignee: Au Optronics CorporationInventors: Wei-Hao Tseng, Fan-Wei Chang, Shou-Wei Fang, Hong-Syu Chen, Jen-Yu Lee, Tsung-Hsiang Shih, Hung-Che Ting
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Patent number: 9331106Abstract: A fabrication method of a pixel structure includes the following steps. A first metal layer is patterned to form a source electrode and a drain electrode. A semiconductor material layer is patterned to form a channel layer and a pixel pattern. A first insulation layer is formed to cover the channel layer, the source electrode, the drain electrode and the pixel pattern. A gate electrode is formed on the first insulation layer located above the channel layer. A second insulation layer is formed to cover the gate electrode and the first insulation layer. A pixel opening is formed in the first insulation layer and the second insulation layer to expose a partial region of the pixel pattern. The partial region of the pixel pattern exposed by the pixel opening is modified so as to form a pixel electrode electrically connected to the drain electrode.Type: GrantFiled: March 20, 2014Date of Patent: May 3, 2016Assignee: Au Optronics CorporationInventors: Wei-Hao Tseng, Fan-Wei Chang, Shou-Wei Fang, Hong-Syu Chen, Jen-Yu Lee, Tsung-Hsiang Shih, Hung-Che Ting
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Publication number: 20150270293Abstract: A fabrication method of a pixel structure includes the following steps. A first metal layer is patterned to form a source electrode and a drain electrode. A semiconductor material layer is patterned to form a channel layer and a pixel pattern. A first insulation layer is formed to cover the channel layer, the source electrode, the drain electrode and the pixel pattern. A gate electrode is formed on the first insulation layer located above the channel layer. A second insulation layer is formed to cover the gate electrode and the first insulation layer. A pixel opening is formed in the first insulation layer and the second insulation layer to expose a partial region of the pixel pattern. The partial region of the pixel pattern exposed by the pixel opening is modified so as to form a pixel electrode electrically connected to the drain electrode.Type: ApplicationFiled: May 22, 2015Publication date: September 24, 2015Inventors: Wei-Hao Tseng, Fan-Wei Chang, Shou-Wei Fang, Hong-Syu Chen, Jen-Yu Lee, Tsung-Hsiang Shih, Hung-Che Ting
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Publication number: 20150123111Abstract: A fabrication method of a pixel structure includes the following steps. A first metal layer is patterned to form a source electrode and a drain electrode. A semiconductor material layer is patterned to form a channel layer and a pixel pattern. A first insulation layer is formed to cover the channel layer, the source electrode, the drain electrode and the pixel pattern. A gate electrode is formed on the first insulation layer located above the channel layer. A second insulation layer is formed to cover the gate electrode and the first insulation layer. A pixel opening is formed in the first insulation layer and the second insulation layer to expose a partial region of the pixel pattern. The partial region of the pixel pattern exposed by the pixel opening is modified so as to form a pixel electrode electrically connected to the drain electrode.Type: ApplicationFiled: March 20, 2014Publication date: May 7, 2015Applicant: Au Optronics CorporationInventors: Wei-Hao Tseng, Fan-Wei Chang, Shou-Wei Fang, Hong-Syu Chen, Jen-Yu Lee, Tsung-Hsiang Shih, Hung-Che Ting
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Patent number: 8541779Abstract: A pixel structure of an organic electroluminescence apparatus includes at least an active device connected to a scan line and a data line, a first electrode, a dielectric material layer, a first isolating layer, a second isolating layer, an organic light-emitting material layer and a second electrode. The dielectric material layer is disposed on the first electrode and has a first opening to expose the first electrode. The first isolating layer disposed on the dielectric material layer includes an oxide semiconductor material and has a second opening to expose the first electrode. The second isolating layer is disposed on the first isolating layer and has a third opening to expose the first electrode in the first opening and the first isolating layer in a sidewall of the second opening. The organic light-emitting material layer is in the third opening. The second electrode is on the organic light-emitting layer.Type: GrantFiled: September 7, 2012Date of Patent: September 24, 2013Assignee: Au Optronics CorporationInventors: Hong-Syu Chen, Shou-Wei Fang, Jen-Yu Lee, Tsung-Hsiang Shih, Hsueh-Hsing Lu, Chia-Yu Chen
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Publication number: 20090244822Abstract: A touch control pen for a portable electronic device includes a resilient positioning sleeve sleeved sealingly on an elongate main body and disposed adjacent to a head end of the main body. When the touch control pen is inserted into a slot defined by a looped surrounding wall of a housing of the portable electronic device, the positioning sleeve contacts watertightly an inner annular surface of the looped surrounding wall of the housing.Type: ApplicationFiled: March 28, 2008Publication date: October 1, 2009Inventors: Li-Ying Chen, En-Guang Huang, Jen-Yu Lee, Fei-Ming Su
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Publication number: 20070071438Abstract: A handheld electronic device includes a casing, a camera unit, and a sealing unit. The casing confines an accommodating space, and is formed with a recess that is defined by a recess-defining wall. The recess-defining wall is formed with a hole that is in spatial communication with the recess and the accommodating space. The camera unit includes a camera housing and an electrical wire. The camera housing is disposed in the recess, and has a first end portion that is received rotatably in the hole in the recess-defining wall. The electrical wire has a first end portion that extends into the camera housing, and a second end portion that extends into the accommodating space. The sealing unit is disposed between and is in airtight contact with the recess-defining wall and the camera housing.Type: ApplicationFiled: September 27, 2005Publication date: March 29, 2007Applicant: Universal Scientific Industrial Co., Ltd.Inventors: Baron Huang, Jen-Yu Lee, Fei-Mi Su, Shun-Fu Chen
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Patent number: 6997743Abstract: A card-securing device has a plate body for securing a card to a printed circuit board. The plate body includes a main plate, and a pair of side-securing plates and an end-securing plate which extend transversely from the main plate. Each of the side-securing plates and the end-securing plate has a base portion connected to the main plate, a neck portion extending and reduced in length from the corresponding base portion, and a tab portion bent and extending from the corresponding neck portion through the printed circuit board to anchor on a bottom surface of the printed circuit board.Type: GrantFiled: October 21, 2004Date of Patent: February 14, 2006Assignee: Universal Scientific Industrial Co., Ltd.Inventors: Fei-Ming Su, Eng-Guang Huang, Jen-Yu Lee