Patents by Inventor Jen-Yung Tseng

Jen-Yung Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6723654
    Abstract: A method for in-situ descum/hot bake/dry etch a polyimide photoresist layer and a passivation layer in a singe process chamber is disclosed. A process chamber that can be used for conducting in-situ a descum, a hot bake and a dry etch process sequentially in the same chamber is also disclosed. In the method, a process chamber equipped with a wafer platform and a wafer backside heating and cooling device is first provided, followed by the step of positioning a wafer that has a passivation layer and a patterned polyimide photoresist layer on top of the platform. An oxygen plasma is then generated in the chamber cavity to conduct a descum process, followed by flowing a heated inert gas onto a backside of the wafer to conduct a hot bake process. A cooling inert gas is then flown onto the wafer backside and an etchant gas is flown into the chamber to conduct a dry etch process for forming a via opening in the wafer.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: April 20, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Kuei-Jen Chang, Yuan-Ko Hwang, Juei-Wen Lin, Jen-Yung Tseng
  • Publication number: 20020139775
    Abstract: A method for in-situ descum/hot bake/dry etch a polyimide photoresist layer and a passivation layer in a singe process chamber is disclosed. A process chamber that can be used for conducting in-situ a descum, a hot bake and a dry etch process sequentially in the same chamber is also disclosed. In the method, a process chamber equipped with a wafer platform and a wafer backside heating and cooling device is first provided, followed by the step of positioning a wafer that has a passivation layer and a patterned polyimide photoresist layer on top of the platform. An oxygen plasma is then generated in the chamber cavity to conduct a descum process, followed by flowing a heated inert gas onto a backside of the wafer to conduct a hot bake process. A cooling inert gas is then flown onto the wafer backside and an etchant gas is flown into the chamber to conduct a dry etch process for forming a via opening in the wafer.
    Type: Application
    Filed: March 30, 2001
    Publication date: October 3, 2002
    Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventors: Kuei-Jen Chang, Yuan-Ko Hwang, Juei-Wen Lin, Jen-Yung Tseng