Patents by Inventor Jeng-Cheng Liu

Jeng-Cheng Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973101
    Abstract: An image-sensor device is provided. The image-sensor device includes a semiconductor substrate and a radiation-sensing region in the semiconductor substrate. The image-sensor device also includes a doped isolation region in the semiconductor substrate and a dielectric film extending into the doped isolation region from a surface of the semiconductor substrate. A portion of the doped isolation region is between the dielectric film and the radiation-sensing region.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung
  • Patent number: 11915977
    Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Ting Tsai, Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Chih-Hui Huang, Sheng-Chau Chen, Shih Pei Chou, Chia-Chieh Lin
  • Patent number: 11569655
    Abstract: A power delivery system includes a power sourcing equipment, a powered device and a transmission cable. When the power sourcing equipment is electrically connected to the powered device via the transmission cable, an over-current detecting circuit in the power sourcing equipment is configured to detect over-current occurrence of the powered device. Meanwhile, the power sourcing equipment is configured to determine the functionality of the over-current detecting circuit based on its specific pin and provide single fault protection when the over-current detecting circuit fails.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: January 31, 2023
    Assignee: WELTREND SEMICONDUCTOR INC.
    Inventors: Cheng-Liang Lin, Jeng-Cheng Liu
  • Publication number: 20220385059
    Abstract: A power delivery system includes a power sourcing equipment, a powered device and a transmission cable. When the power sourcing equipment is electrically connected to the powered device via the transmission cable, an over-current detecting circuit in the power sourcing equipment is configured to detect over-current occurrence of the powered device. Meanwhile, the power sourcing equipment is configured to determine the functionality of the over-current detecting circuit based on its specific pin and provide single fault protection when the over-current detecting circuit fails.
    Type: Application
    Filed: August 31, 2021
    Publication date: December 1, 2022
    Applicant: WELTREND SEMICONDUCTOR INC.
    Inventors: Cheng-Liang Lin, Jeng-Cheng Liu
  • Patent number: 11050351
    Abstract: A control method is introduced to operate an ACF power converter under a non-complimentary mode. A high-side switch is turned ON at least twice within a switching cycle of a low-side switch, to provide at least two high-side ON times. One of the high-side ON times follows the end of demagnetization time of a transformer in the ACF power converter, and the other follows the end of the blanking time that controls the maximum switching frequency of the low-side switch.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: June 29, 2021
    Assignee: WELTREND SEMICONDUCTOR INC.
    Inventors: Mu-Chih Lin, Chun-Teh Chen, Ren-Yi Chen, Ming-Ying Kuo, Jeng-Cheng Liu
  • Publication number: 20210091672
    Abstract: A control method is introduced to operate an ACF power converter under a non-complimentary mode. A high-side switch is turned ON at least twice within a switching cycle of a low-side switch, to provide at least two high-side ON times. One of the high-side ON times follows the end of demagnetization time of a transformer in the ACF power converter, and the other follows the end of the blanking time that controls the maximum switching frequency of the low-side switch.
    Type: Application
    Filed: May 13, 2020
    Publication date: March 25, 2021
    Inventors: Mu-Chih LIN, Chun-Teh CHEN, Ren-Yi CHEN, Ming-Ying KUO, Jeng-Cheng LIU
  • Patent number: 10154559
    Abstract: A control circuit includes a first control unit, a power unit, a driver unit, a second control unit, a power source, a first switch, a pull-up element and a second switch. The first control unit is used to detect whether a configuration channel line has a predetermined divided voltage and generate a control signal accordingly. The power unit is coupled to the configuration channel line and a power line for supplying power to the driver unit. The driver unit is used to enable or disable a light emitting unit according to the control signal. The second control unit is used to detect whether the configuration channel line has the predetermined divided voltage and control the first switch and the second switch accordingly. The first switch is coupled between a power source and the configuration channel line. The second switch is coupled between the pull-up element and the configuration channel line.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: December 11, 2018
    Assignee: WELTREND SEMICONDUCTOR INC.
    Inventors: Chih-Sheng Yang, Jeng-Cheng Liu
  • Patent number: 7042049
    Abstract: A new method of forming a composite etching stop layer is described. An etching stop layer is deposited on a substrate wherein the etching stop layer is selected from the group consisting of: silicon carbide, silicon nitride, SiCN, SiOC, and SiOCN. A TEOS oxide layer is deposited by plasma-enhanced chemical vapor deposition overlying the etching stop layer. The composite etching stop layer has improved moisture resistance, better etching selectivity, and lower dielectric constant than other etching stop layers.
    Type: Grant
    Filed: April 13, 2004
    Date of Patent: May 9, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Lain-Jong Li, Tien-I Bao, Shwang-Ming Jeng, Syun-Ming Jang, Jun-Lung Huang, Jeng-Cheng Liu
  • Publication number: 20040191977
    Abstract: A new method of forming a composite etching stop layer is described. An etching stop layer is deposited on a substrate wherein the etching stop layer is selected from the group consisting of: silicon carbide, silicon nitride, SiCN, SiOC, and SiOCN. A TEOS oxide layer is deposited by plasma-enhanced chemical vapor deposition overlying the etching stop layer. The composite etching stop layer has improved moisture resistance, better etching selectivity, and lower dielectric constant than other etching stop layers.
    Type: Application
    Filed: April 13, 2004
    Publication date: September 30, 2004
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY
    Inventors: Lain-Jong Li, Tien-I Bao, Shwang-Ming Jeng, Syun-Ming Jang, Jun-Lung Huang, Jeng-Cheng Liu
  • Patent number: 6753260
    Abstract: A new method of forming a composite etching stop layer is described. An etching stop layer is deposited on a substrate wherein the etching stop layer is selected from the group consisting of: silicon carbide, silicon nitride, SiCN, SiOC, and SiOCN. A TEOS oxide layer is deposited by plasma-enhanced chemical vapor deposition overlying the etching stop layer. The composite etching stop layer has improved moisture resistance, better etching selectivity, and lower dielectric constant than other etching stop layers.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: June 22, 2004
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Lain-Jong Li, Tien-I Bao, Shwang-Ming Jeng, Syun-Ming Jang, Jun-Lung Huang, Jeng-Cheng Liu