Patents by Inventor Jeng-Huan Yang

Jeng-Huan Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7235442
    Abstract: A method for fabricating a conductive line is provided. First, a substrate having at least two isolation structures already formed is provided. A first conductive layer is formed between every two isolation structures. Then, a dielectric layer is formed on the substrate. The dielectric layer is patterned to form an opening exposing the first conductive layer. After that, a second conductive layer is formed on the substrate. A portion of the second conductive layer outside the opening is removed to form a conductive line. As the size of the device is getting smaller, the size and the position accuracy of the conductive line would not be limited to the design rules of lithography if the present invention is applied. Therefore, a conductive line is formed to electrically connect semiconductor devices effectively.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: June 26, 2007
    Assignee: Powerchip Semiconductor Corp.
    Inventors: Pin-Yao Wang, Liang-Chuan Lai, Jeng-Huan Yang
  • Publication number: 20070010053
    Abstract: A method for fabricating a conductive line is provided. First, a substrate having at least two isolation structures already formed is provided. A first conductive layer is formed between every two isolation structures. Then, a dielectric layer is formed on the substrate. The dielectric layer is patterned to form an opening exposing the first conductive layer. After that, a second conductive layer is formed on the substrate. A portion of the second conductive layer outside the opening is removed to form a conductive line. As the size of the device is getting smaller, the size and the position accuracy of the conductive line would not be limited to the design rules of lithography if the present invention is applied. Therefore, a conductive line is formed to electrically connect semiconductor devices effectively.
    Type: Application
    Filed: December 12, 2005
    Publication date: January 11, 2007
    Inventors: Pin-Yao Wang, Liang-Chuan Lai, Jeng-Huan Yang
  • Publication number: 20060284311
    Abstract: A method of manufacturing self-aligned contact openings is provided. A substrate having a plurality of device structures is provided and the top of the device structures is higher than the surface of the substrate. A first dielectric layer and a conductive layer are sequentially formed on the surfaces of the substrate and the device structures. Next, a part of the conductive layers on the top and the sidewalls of the device structures is removed and a plurality of first spacers is formed on the exposed sidewalls of the device structures. The exposed conductive layer and the first dielectric layer are removed by using the first spacer as the mask to expose the substrate. Then, a plurality of conductive spacers is formed. A plurality of second spacers is formed on the sidewalls of the conductive spacers.
    Type: Application
    Filed: December 15, 2005
    Publication date: December 21, 2006
    Inventors: Pin-Yao Wang, Liang-Chuan Lai, Jeng-Huan Yang
  • Publication number: 20060199352
    Abstract: A method of manufacturing a shallow trench isolation structure adapted for a substrate, is provided. A dielectric film is formed on the substrate and then a buffer layer having a first thickness is formed on the dielectric film. Then, a hard mask layer having a second thickness is formed on the buffer layer. The hard mask layer, the buffer layer, the dielectric film and the substrate are patterned to form an opening in the hard mask layer, the buffer layer and the dielectric film and a trench in the substrate. An insulating layer is formed to fill up the opening and the trench. Thereafter, the hard mask layer, a portion of the insulating layer and the buffer layer are removed to form a shallow trench isolation structure that protrudes out of the substrate surface.
    Type: Application
    Filed: June 15, 2005
    Publication date: September 7, 2006
    Inventors: Min-San Huang, Pin-Yao Wang, Jeng-Huan Yang