Patents by Inventor Jeng-Jong CHEN

Jeng-Jong CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240089075
    Abstract: A physical layer (PHY) processor of a network device receives: a timing packet that includes initial timing information, and one or more indicators of one or more parameters to be used by the PHY processor for embedding timing information into the timing packet, the one or more indicators including at least i) an indicator indicating that the timing packet is a type of packet into which timing information is to be embedded by the PHY device, ii) an indicator of a location of a field in the timing packet at which the timing information is to be embedded into the timing packet by the PHY device, and iii) an indicator of whether timing information in the timing packet needs to be updated by the PHY device. The PHY processor updates, based on the one or more indicators, the initial timing information in the timing packet.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 14, 2024
    Inventors: Nitzan DROR, Lenin PATRA, Jeng-Jong CHEN
  • Patent number: 11818241
    Abstract: A physical layer (PHY) processor of a network device receives: a timing packet that includes initial timing information, and one or more indicators of one or more parameters to be used by the PHY processor for embedding timing information into the timing packet, the one or more indicators including at least i) an indicator indicating that the timing packet is a type of packet into which timing information is to be embedded by the PHY device, ii) an indicator of a location of a field in the timing packet at which the timing information is to be embedded into the timing packet by the PHY device, and iii) an indicator of whether timing information in the timing packet needs to be updated by the PHY device. The PHY processor updates, based on the one or more indicators, the initial timing information in the timing packet.
    Type: Grant
    Filed: February 2, 2023
    Date of Patent: November 14, 2023
    Assignee: Marvell Asia Pte Ltd
    Inventors: Nitzan Dror, Lenin Patra, Jeng-Jong Chen
  • Publication number: 20230188313
    Abstract: A physical layer (PHY) processor of a network device receives: a timing packet that includes initial timing information, and one or more indicators of one or more parameters to be used by the PHY processor for embedding timing information into the timing packet, the one or more indicators including at least i) an indicator indicating that the timing packet is a type of packet into which timing information is to be embedded by the PHY device, ii) an indicator of a location of a field in the timing packet at which the timing information is to be embedded into the timing packet by the PHY device, and iii) an indicator of whether timing information in the timing packet needs to be updated by the PHY device. The PHY processor updates, based on the one or more indicators, the initial timing information in the timing packet.
    Type: Application
    Filed: February 2, 2023
    Publication date: June 15, 2023
    Inventors: Nitzan DROR, Lenin PATRA, Jeng-Jong CHEN
  • Patent number: 11575495
    Abstract: A media access control (MAC) processor of a network device receives a timing packet to be transmitted by the network device. The MAC processor generates one or more indicators to be used by a PHY device of the network device for embedding timing information into the timing packet. The one or more indicators include at least an indicator indicating that the timing packet is a type of packet into which timing information is to be embedded, an indicator of a location of a field in the timing packet at which the timing information is to be embedded, and an indicator of whether timing information in the timing packet needs to be updated. The MAC processor transfers the timing packet and the one or more indicators to the PHY device for further processing of the timing packet and subsequent transmission of the timing packet from the network device.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: February 7, 2023
    Assignee: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Nitzan Dror, Lenin Patra, Jeng-Jong Chen
  • Publication number: 20210297230
    Abstract: A media access control (MAC) processor of a network device receives a timing packet to be transmitted by the network device. The MAC processor generates one or more indicators to be used by a PHY device of the network device for embedding timing information into the timing packet. The one or more indicators include at least an indicator indicating that the timing packet is a type of packet into which timing information is to be embedded, an indicator of a location of a field in the timing packet at which the timing information is to be embedded, and an indicator of whether timing information in the timing packet needs to be updated. The MAC processor transfers the timing packet and the one or more indicators to the PHY device for further processing of the timing packet and subsequent transmission of the timing packet from the network device.
    Type: Application
    Filed: March 23, 2021
    Publication date: September 23, 2021
    Inventors: Nitzan DROR, Lenin PATRA, Jeng-Jong CHEN