Patents by Inventor Jeng-Jyi Hwang

Jeng-Jyi Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11772227
    Abstract: An apparatus for CMP includes a wafer carrier retaining a semiconductor wafer during a polishing operation, a slurry dispenser dispensing an abrasive slurry, and a slurry temperature control device coupled to the shiny dispenser and configured to control a temperature of the abrasive slurry. The slurry temperature control device includes a heat transferring portion surrounding a portion of the slurry dispenser, and a thermos-electric (TE) chip coupled to the heat transferring portion and configured to control the temperature of the abrasive slurry.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: October 3, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: James Jeng-Jyi Hwang, He Hui Peng, Jiann Lih Wu, Chi-Ming Yang
  • Publication number: 20230211452
    Abstract: A wafer polishing head is provided. The wafer polishing head includes a carrier head, a plurality of piezoelectric actuators disposed on the carrier head, and a membrane disposed over the plurality of piezoelectric actuators. The plurality of piezoelectric actuators is configured to provide mechanical forces on the membrane and generate an electrical charge when receiving counterforces of the mechanical forces through the membrane. A wafer polishing system and a method for polishing a substrate using the same are also provided.
    Type: Application
    Filed: March 13, 2023
    Publication date: July 6, 2023
    Inventors: JAMES JENG-JYI HWANG, HE HUI PENG, JIANN LIH WU, CHI-MING YANG
  • Patent number: 11602821
    Abstract: A wafer polishing head is provided. The wafer polishing head includes a carrier head, a plurality of piezoelectric actuators disposed on the carrier head, and a membrane disposed over the plurality of piezoelectric actuators. The plurality of piezoelectric actuators is configured to provide mechanical forces on the membrane and generate an electrical charge when receiving counterforces of the mechanical forces through the membrane. A wafer polishing system and a method for polishing a substrate using the same are also provided.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: March 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: James Jeng-Jyi Hwang, He Hui Peng, Jiann Lih Wu, Chi-Ming Yang
  • Publication number: 20220384198
    Abstract: A method for polishing a semiconductor substrate includes the following operations. A semiconductor substrate is received. An abrasive slurry having a first temperature is dispensed to a polishing surface of a polishing pad. The semiconductor substrate is polished. The abrasive slurry have a second temperature is dispensed to the polishing surface of the polishing pad during the polishing of the semiconductor substrate. The second temperature is different from the first temperature.
    Type: Application
    Filed: August 8, 2022
    Publication date: December 1, 2022
    Inventors: JAMES JENG-JYI HWANG, HE HUI PENG, JIANN LIH WU, CHI-MING YANG
  • Publication number: 20220214620
    Abstract: A reticle-masking structure is provided. The reticle-masking structure includes a magnetic substrate and a paramagnetic part disposed on the magnetic substrate. The paramagnetic part includes a plurality of fractions disposed on a plurality of protrusion structures. In some embodiments, the fractions are irregularly arranged. A method for forming a reticle-masking structure and an extreme ultraviolet apparatus are also provided.
    Type: Application
    Filed: March 25, 2022
    Publication date: July 7, 2022
    Inventors: CHING-HSIANG HSU, JAMES JENG-JYI HWANG, FENG YUAN HSU
  • Patent number: 11287745
    Abstract: A reticle-masking structure is provided. The reticle-masking structure includes a magnetic substrate and a paramagnetic part disposed on the magnetic substrate. The paramagnetic part includes a plurality of fractions disposed on a plurality of protrusion structures. In some embodiments, the protrusion structures are irregularly arranged. A method for forming a reticle-masking structure and an extreme ultraviolet apparatus are also provided.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: March 29, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ching-Hsiang Hsu, James Jeng-Jyi Hwang, Feng Yuan Hsu
  • Publication number: 20210220965
    Abstract: A wafer polishing head is provided. The wafer polishing head includes a carrier head, a plurality of piezoelectric actuators disposed on the carrier head, and a membrane disposed over the plurality of piezoelectric actuators. The plurality of piezoelectric actuators is configured to provide mechanical forces on the membrane and generate an electrical charge when receiving counterforces of the mechanical forces through the membrane. A wafer polishing system and a method for polishing a substrate using the same are also provided.
    Type: Application
    Filed: January 17, 2020
    Publication date: July 22, 2021
    Inventors: JAMES JENG-JYI HWANG, HE HUI PENG, JIANN LIH WU, CHI-MING YANG
  • Publication number: 20210096469
    Abstract: A reticle-masking structure is provided. The reticle-masking structure includes a magnetic substrate and a paramagnetic part disposed on the magnetic substrate. The paramagnetic part includes a plurality of fractions disposed on a plurality of protrusion structures. In some embodiments, the protrusion structures are irregularly arranged. A method for forming a reticle-masking structure and an extreme ultraviolet apparatus are also provided.
    Type: Application
    Filed: December 14, 2020
    Publication date: April 1, 2021
    Inventors: CHING-HSIANG HSU, JAMES JENG-JYI HWANG, FENG YUAN HSU
  • Publication number: 20210039223
    Abstract: An apparatus for CMP includes a wafer carrier retaining a semiconductor wafer during a polishing operation, a slurry dispenser dispensing an abrasive slurry, and a slurry temperature control device coupled to the shiny dispenser and configured to control a temperature of the abrasive slurry. The slurry temperature control device includes a heat transferring portion surrounding a portion of the slurry dispenser, and a thermos-electric (TE) chip coupled to the heat transferring portion and configured to control the temperature of the abrasive slurry.
    Type: Application
    Filed: April 1, 2020
    Publication date: February 11, 2021
    Inventors: JAMES JENG-JYI HWANG, HE HUI PENG, JIANN LIH WU, CHI-MING YANG
  • Patent number: 10875148
    Abstract: An apparatus for CMP includes a wafer carrier retaining a semiconductor wafer during a polishing operation, a slurry dispenser dispensing an abrasive slurry, and a temperature control system monitoring and controlling a temperature variation during the polishing operation. The temperature control system includes a temperature sensor detecting a temperature during the polishing operation and providing a signal corresponding to the temperature, a temperature controller coupled to the temperature sensor and receiving the signal from the temperature sensor, and a cooling device coupled to the temperature controller and providing a coolant to the apparatus for CMP.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: December 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: He Hui Peng, James Jeng-Jyi Hwang, Chi-Ming Yang, Yung-Yao Lee, Yen-Di Tsen
  • Patent number: 10875143
    Abstract: An apparatus for CMP includes a platen, a wafer carrier retaining a semiconductor wafer during a polishing operation, a dresser configured to recondition a polishing pad disposed on the platen during the polishing operation, and a vibration-monitoring system configured to detect vibrations during the polishing operation. The vibration-monitoring system includes a first vibration sensor configured to generate a plurality of first vibration signals. An end point is triggered to the polishing when a change between the plurality of vibration signals reaches a value.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: December 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: James Jeng-Jyi Hwang, Jiann Lih Wu, He Hui Peng, Chi-Ming Yang
  • Patent number: 10866519
    Abstract: A reticle-masking structure is provided. The reticle-masking structure includes a magnetic substrate and a paramagnetic part disposed on the magnetic substrate. The magnetic substrate has a magnetic field, and the paramagnetic part has an induced magnetic field in a direction of the magnetic field of the magnetic substrate. The paramagnetic part includes a rough surface defined by a plurality of protrusion structures of the paramagnetic part. A method for forming a reticle-masking structure and an extreme ultraviolet apparatus are also provided.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ching-Hsiang Hsu, James Jeng-Jyi Hwang, Feng Yuan Hsu
  • Publication number: 20200039019
    Abstract: An apparatus for CMP includes a platen, a wafer carrier retaining a semiconductor wafer during a polishing operation, a dress configured to recondition a polishing pad disposed on the platen during the polishing operation, and a vibration-monitoring system configured to detect vibrations during the polishing operation. The vibration-monitoring system includes a first vibration sensor configured to generate a plurality of first vibration signals. An end point is triggered to the polishing when a change between the plurality of vibration signals reaches a value.
    Type: Application
    Filed: July 24, 2019
    Publication date: February 6, 2020
    Inventors: JAMES JENG-JYI HWANG, JIANN LIH WU, HE HUI PENG, CHI-MING YANG
  • Patent number: 10513006
    Abstract: A chemical-mechanical polishing system has a first polishing apparatus configured to perform a first chemical-mechanical polish on a workpiece and a second polishing apparatus configured to perform a second chemical-mechanical polish on the workpiece. A rework polishing apparatus comprising a rework platen and a rework CMP head is configured to perform an auxiliary chemical-mechanical polish on the workpiece when the workpiece is positioned on the rework platen. A measurement apparatus measures one or more parameters of the workpiece, and a transport apparatus transports the workpiece between the first polishing apparatus, second polishing apparatus, rework polishing apparatus, and measurement apparatus. A controller determines a selective transport of the workpiece to the rework polishing apparatus by the transport apparatus only when the one or more parameters are unsatisfactory.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jiann Lih Wu, Jason Shen, Soon-Kang Huang, James Jeng-Jyi Hwang, Chi-Ming Yang
  • Patent number: 10507498
    Abstract: The present disclosure provides a particle cleaning apparatus. The apparatus comprises an acoustic wave generator configured to apply an acoustic wave to particles external to the acoustic wave generator. The apparatus also includes a removing module configured to remove the applied particles.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: December 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ying-Hsueh Chang Chien, James Jeng-Jyi Hwang, Chi-Ming Yang
  • Publication number: 20190375071
    Abstract: An apparatus for CMP includes a wafer carrier retaining a semiconductor wafer during a polishing operation, a slurry dispenser dispensing an abrasive slurry, and a temperature control system monitoring and controlling a temperature variation during the polishing operation. The temperature control system includes a temperature sensor detecting a temperature during the polishing operation and providing a signal corresponding to the temperature, a temperature controller coupled to the temperature sensor and receiving the signal from the temperature sensor, and a cooling device coupled to the temperature controller and providing a coolant to the apparatus for CMP.
    Type: Application
    Filed: June 8, 2018
    Publication date: December 12, 2019
    Inventors: HE HUI PENG, JAMES JENG-JYI HWANG, CHI-MING YANG, YUNG-YAO LEE, YEN-DI TSEN
  • Patent number: 10090207
    Abstract: A wafer polishing system including a platen configured to rotate in a first direction, and a polishing head configured to hold a wafer, the polishing head configured to rotate in a second direction. The wafer polishing system further includes an optical sensing system configured to detect a thickness of the wafer at a first location on the platen and a second location on the platen. A first distance from a center of the platen to the first location is different than a second distance from the center of the platen to the second location.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: October 2, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jiann Lih Wu, Jeng-Jyi Hwang, Soon-Kang Huang, Chi-Ming Yang
  • Patent number: 10065288
    Abstract: A localized chemical mechanical polishing (CMP) platform is provided. A table is configured to support a workpiece with a to-be-polished surface. A polishing pad is spaced from the table with a width less than about half that of the table. The polishing pad is configured to individually polish rough regions of hillocks or valleys on the to-be-polished surface. A slurry distribution system is configured to apply slurry to an interface between the polishing pad and the workpiece. A cleaning system is configured to clean the workpiece in situ on the table. A drying system is configured to dry the workpiece in situ on the table. A method for CMP with local profile control and a system with local profile control are also provided.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: September 4, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jiann Lih Wu, Chi-Ming Yang, James Jeng-Jyi Hwang
  • Patent number: 10035929
    Abstract: The present disclosure relates to a method of forming a CMP slurry that is free of pH-adjusters (i.e., chemicals added solely for the purpose of adjusting a pH of a CMP slurry), and an associated a pH-adjuster free CMP slurry. In some embodiments, the method is performed by forming a CMP slurry having a first pH value. A desired pH value of the CMP slurry is determined. A chelating agent configured to bond to metallic ions is provided to the CMP slurry. The chelating agent is configured to adjust a pH value of the CMP slurry from the first pH value to the desired pH value. By using the chelating agent to adjust a pH value of the CMP slurry to achieve a desired pH value, the method is able to form a CMP slurry that is free of pH-adjusters, thereby reducing the cost and complexity of the CMP slurry.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: July 31, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shu-Hao Huang, Horng-Huei Tseng, Chi-Ming Yang, Jeng-Jyi Hwang
  • Patent number: 9958424
    Abstract: The present disclosure provides a method of identifying an airborne molecular contamination (AMC) leaking source in a fab. The method includes distributing a sensor in the fab, executing a forward computational fluid dynamics (CFD) simulation of an air flow in the fab, setting an inversed modeling of the forward CFD simulation of the air flow in the fab, building up a database of a spatial response probability distribution matrix of the sensor using an AMC measurement data in the fab, and identifying the AMC leaking source using the database of the spatial response probability distribution matrix of the sensor.
    Type: Grant
    Filed: October 1, 2012
    Date of Patent: May 1, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzu-Sou Chuang, Jeng-Jyi Hwang, Cheng-Lung Chou, Chi-Ming Yang, Chin-Hsiang Lin