Patents by Inventor Jeng Liu
Jeng Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240168373Abstract: A photoresist composition includes a mixture. The mixture includes a first photosensitive material and a second photosensitive material. The first photosensitive material is a 6-Sn oxide cluster, a 12-Sn oxide cluster or a combination thereof. The second photosensitive material has a composition being different from a composition of the first photosensitive material.Type: ApplicationFiled: June 13, 2023Publication date: May 23, 2024Applicants: Taiwan Semiconductor Manufacturing Company, Ltd., National Tsing Hua UniversityInventors: Jui-Hsiung LIU, Tsai-Sheng GAU, Burn Jeng LIN, Yan-Ru WU, Ting-An LIN, Han-Tsung TSAI, Po-Hsiung CHEN
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Patent number: 11984668Abstract: A device includes a patch antenna, which includes a feeding line, and a ground panel over the feeding line. The ground panel has an aperture therein. A low-k dielectric module is over and aligned to the aperture. A patch is over the low-k dielectric module.Type: GrantFiled: June 28, 2021Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Monsen Liu, Lai Wei Chih, Chung-Hao Tsai, Jeng-Shien Hsieh, En-Hsiang Yeh, Chuei-Tang Wang
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Publication number: 20240111210Abstract: A method of manufacturing a semiconductor device includes the following steps. A photoresist layer is formed over a material layer on a substrate. The photoresist layer has a composition including a solvent and a first photo-active compound dissolved in the solvent. The first photo-active compound is represented by the following formula (A1) or formula (A2): Zr12O8(OH)14(RCO2)18 ??Formula (A1); or Hf6O4(OH)6(RCO2)10 ??Formula (A2). R in the formula (A1) and R in the formula (A2) each include one of the following formulae (1) to (6): The photoresist layer is patterned. The material layer is etched using the photoresist layer as an etch mask.Type: ApplicationFiled: May 9, 2023Publication date: April 4, 2024Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TSING HUA UNIVERSITYInventors: Jui-Hsiung LIU, Pin-Chia LIAO, Ting-An LIN, Ting-An SHIH, Yu-Fang TSENG, Burn Jeng LIN, Tsai-Sheng GAU, Po-Hsiung CHEN, Po-Wen CHIU
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Publication number: 20240112912Abstract: A method of manufacturing a semiconductor device includes the following steps. A photoresist layer is formed over a material layer on a substrate. The photoresist layer has a composition including a solvent and a first photo-active compound dissolved in the solvent. The first photo-active compound is represented by the following formula (Al) or formula (A2): Zr12O8(OH)14(RCO2)18??Formula (A1); or Hf6O4(OH)6(RCO2)10??Formula (A2). R in the formula (A1) and R in the formula (A2) each include one of the following formulae (1) to (6): The photoresist layer is patterned. The material layer is etched using the photoresist layer as an etch mask.Type: ApplicationFiled: July 28, 2023Publication date: April 4, 2024Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TSING HUA UNIVERSITYInventors: Jui-Hsiung LIU, Yu-Fang TSENG, Pin-Chia LIAO, Burn Jeng LIN, Tsai-Sheng GAU, Po-Hsiung CHEN, Po-Wen CHIU
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Patent number: 11917230Abstract: A system and method for maximizing bandwidth in an uplink for a 5G communication system is disclosed. Multiple end devices generate image streams. A gateway is coupled to the end devices. The gateway includes a gateway monitor agent collecting utilization rate data of the gateway and an image inspector collecting inspection data from the received image streams. An edge server is coupled to the gateway. The edge server includes an edge server monitor agent collecting utilization rate data of the edge server. An analytics manager is coupled to the gateway and the edge server. The analytics manager is configured to determine an allocation strategy based on the collected utilization rate data from the gateway and the edge server.Type: GrantFiled: October 6, 2021Date of Patent: February 27, 2024Assignee: Quanta Cloud Technology Inc.Inventors: Yi-Neng Zeng, Keng-Cheng Liu, Wei-Ming Huang, Shih-Hsun Lai, Ji-Jeng Lin, Chia-Jui Lee, Liao Jin Xiang
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Publication number: 20120183429Abstract: A tissue scaffold fabricated from bioinert fiber forms a rigid three-dimensional porous matrix having a bioinert composition. Porosity in the form of interconnected pore space is provided by the space between the bioinert fiber in the porous matrix. Strength of the porous matrix is provided by bioinert fiber fused and bonded into the rigid three-dimensional matrix having a specific pore size and pore size distribution. The tissue scaffold supports tissue in-growth to provide osteoconductivity as a tissue scaffold, used for the repair of damaged and/or diseased bone tissue.Type: ApplicationFiled: July 22, 2011Publication date: July 19, 2012Applicant: BIO2 TECHNOLOGIES, INC.Inventor: James Jeng Liu
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Publication number: 20110206828Abstract: A resorbable tissue scaffold fabricated from bioactive glass fiber forms a rigid three-dimensional porous matrix having a bioactive composition. Porosity in the form of interconnected pore space is provided by the space between the bioactive glass fiber in the porous matrix. Strength of the bioresorbable matrix is provided by bioactive glass that fuses and bonds the bioactive glass fiber into the rigid three-dimensional matrix. The resorbable tissue scaffold supports tissue in-growth to provide osteoconductivity as a resorbable tissue scaffold, used for the repair of damaged and/or diseased bone tissue.Type: ApplicationFiled: March 11, 2011Publication date: August 25, 2011Applicant: BIO2 Technologies, Inc.Inventors: James Jeng Liu, Janet L. Krevolin
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Publication number: 20110106272Abstract: A resorbable tissue scaffold fabricated from bioactive glass fiber forms a rigid three-dimensional porous matrix having a bioactive composition. Porosity in the form of interconnected pore space is provided by the space between the bioactive glass fiber in the porous matrix. Strength of the bioresorbable matrix is provided by bioactive glass that fuses and bonds the bioactive glass fiber into the rigid three-dimensional matrix. The resorbable tissue scaffold supports tissue in-growth to provide osteoconductivity as a resorbable tissue scaffold, used for the repair of damaged and/or diseased bone tissue.Type: ApplicationFiled: July 8, 2010Publication date: May 5, 2011Applicant: BIO2 TECHNOLOGIES, INC.Inventor: JAMES JENG LIU
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Publication number: 20080292518Abstract: A porous cordierite substrate and a method of forming a porous cordierite substrate including providing a fiber that includes at least one cordierite precursor material and providing at least one organic binder material. The fiber and the organic binder material are mixed with a fluid. The mix of fiber, organic binder material and fluid is extruded into a green substrate. The green substrate is fired to enable the formation of bonds between the fibers and to form a porous cordierite fiber substrate.Type: ApplicationFiled: May 24, 2007Publication date: November 27, 2008Applicant: GEO2 TECHNOLOGIES, INC.Inventors: James Jeng Liu, Bilal Zuberi, Jerry G. Weinstein, Rachel A. Dahl
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Publication number: 20080286179Abstract: A porous ceramic substrate is disclosed that is fabricated from biosoluble ceramic fibers. Porosity and permeability of the substrate is provided by intertangled biosoluble fibers, that can be formed into a honeycomb form substrate through an extrusion process. The fibrous structure is formed from mixing biosoluble fibers with additives that include a bonding agent, and a fluid to provide an extrudable mixture. The structure is sintered at a temperature that exceeds the glass formation temperature of the bonding agent, but less than the maximum operational limits of the biosoluble fiber, to form a structure that has sufficient strength and porosity to provide for filtration and/or as a catalytic host.Type: ApplicationFiled: May 14, 2007Publication date: November 20, 2008Applicant: GEO2 TECHNOLOGIES, INC.Inventors: James Jeng Liu, Bilal Zuberi
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Publication number: 20080242530Abstract: A fibrous ceramic material comprises a plurality of fibers having a RxMg2Al4+xSi5?xO18 or RxMg2?xAl4Si5O18 compositional structure. The fibrous ceramic material is form by combining two or more RxMg2Al4+xSi5?xO18 or RxMg2?xAl4Si5O18 precursors in which at least one of the two or more RxMg2Al4+xSi5?xO18 or RxMg2?xAl4Si5O18 precursors is in fiber form. The fibrous ceramic material is shaped to form a fibrous body in which at least about 20% of all fibers therein are aligned in a substantially common direction.Type: ApplicationFiled: April 17, 2008Publication date: October 2, 2008Applicant: GEO2 Technologies, Inc.Inventors: James Jeng Liu, William M. Carty, Bilal Zuberi, Sunilkumar C. Pillai
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Publication number: 20080241014Abstract: A fibrous ceramic material comprises a plurality of fibers having a modified aluminosilicate compositional structure (i.e., x(RO).y(Al2O3).z(SiO2) or w(MO).x(RO).y(Al2O3).z(SiO2)). The fibrous ceramic material is form by combining two or more x(RO).y(Al2O3).z(SiO2) or w(MO).x(RO).y(Al2O3).z(SiO2) precursors in which at least one of the two or more precursors is in fiber form. The resulting fibrous ceramic material has a low coefficient of thermal expansion (i.e., ?4.7×10?6/° C.).Type: ApplicationFiled: April 17, 2008Publication date: October 2, 2008Applicant: GEO2 Technologies, Inc.Inventors: James Jeng Liu, William M. Carty, Bilal Zuberi, Sunilkumar C. Pillai
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Patent number: 6809408Abstract: A semiconductor package with a die pad having a recessed portion is proposed, wherein a lead frame is used, having a die pad formed with at least a through hole, and a plurality of leads. A chip is mounted on the die pad and covers the through hole, with a bottom surface of the chip being partly exposed out the through hole. The through hole is formed at its peripheral edge with a recessed portion that dents from a top surface of the die pad and is associated with the through hole. During a molding process, the recessed portion is entirely filled with an encapsulating compound used for encapsulating the chip and die pad. This prevents forming of voids between the chip and die pad, and assures packaged products to be free of die crack or popcorn effect, thereby significantly improving yield and reliability of the packaged products.Type: GrantFiled: March 29, 2002Date of Patent: October 26, 2004Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Chen Shih Yu, Chih-Jen Yang, Hung Jui-Hsiang, Chin Jeng Liu, Chen-Hsung Yang
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Publication number: 20030141575Abstract: A semiconductor package with a die pad having a recessed portion is proposed, wherein a lead frame is used, having a die pad formed with at least a through hole, and a plurality of leads. A chip is mounted on the die pad and covers the through hole, with a bottom surface of the chip being partly exposed out the through hole. The through hole is formed at its peripheral edge with a recessed portion that dents from a top surface of the die pad and is associated with the through hole. During a molding process, the recessed portion is entirely filled with an encapsulating compound used for encapsulating the chip and die pad. This prevents forming of voids between the chip and die pad, and assures packaged products to be free of die crack or popcorn effect, thereby significantly improving yield and reliability of the packaged products.Type: ApplicationFiled: March 29, 2002Publication date: July 31, 2003Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chen Shih Yu, Chih-Jen Yang, Hung Jui-Hsiang, Chin Jeng Liu, Chen-Hsung Yang
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Publication number: 20030106803Abstract: A refractory boride body or coating made of a boride of titanium, chromium, vanadium, ziconium, hafnium, niobium, tantalum, molybednum and cerium is produced from a slurry of the refractory boride or a precursor in a collidal carrier preferably composed of two more different grades of the same colloidal carrier selected from colloidal alumina, yttria, ceria, thoria, zirconia, magnesia, lithia, monoaluminum phosphate and cerium acetate. The slurry can also comprise an organic additive selected from polyvinyl alcohol; polyacrylic acid; hydroxyy propyl methyl cellulose; polythylene glycol; ethylene glycol, butyl benzyl phthalate; ammonium polymethacrylate and mixtures thereof. The retractory boride body or coated body is useful as a component of aluminum electrowinning cells.Type: ApplicationFiled: June 27, 2002Publication date: June 12, 2003Inventors: Jainagesh Akkaraju Sekhar, Jean-Jacques Duruz, James Jeng Liu
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Patent number: 6436250Abstract: A refractory boride body or coating made of a boride of titanium, chromium, vanadium, ziconium, hafnium, niobium, tantalum, molybednum and cerium is produced from a slurry of the refractory boride or a precursor in a collidal carrier preferably composed of two more different grades of the same colloidal carrier selected from colloidal alumina, yttria, ceria, thoria, zirconia, magnesia, lithia, monoaluminum phosphate and cerium acetate. The slurry can also comprise an organic additive selected from polyvinyl alcohol; polyacrylic acid; hydroxyy propyl methyl cellulose; polythylene glycol; ethylene glycol, butyl benzyl phthalate; ammonium polymethacrylate and mixtures thereof. The retractory boride body or coated body is useful as a component of aluminum electrowinning cells.Type: GrantFiled: June 10, 1999Date of Patent: August 20, 2002Assignee: Moltech Invent S.A.Inventors: Jainagesh Akkaraju Sekhar, Jean-Jacques Duruz, James Jeng Liu
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Patent number: 6406974Abstract: A method of forming a triple N well is described. A first pattern mask layer is formed on a substrate. A first ion implantation step is performed to form an annular longitudinal deep N well in the substrate. A second ion implantation step is performed to form an annular longitudinal shallow N well in the substrate. The annular longitudinal shallow N well lies above the annular longitudinal deep N well. The first mask layer is removed. A second patterned mask layer is formed on the substrate. A third ion implantation step is performed to form a transversal deep N well surrounded by the annular longitudinal deep N well. The transversal deep N well is connected with the annular longitudinal deep N well. Thus a triple N well is formed. A fourth ion implantation step is performed to form a cell well surrounded by the annular longitudinal deep N well. The cell well lies above the transversal deep N well. The second mask layer is removed.Type: GrantFiled: March 24, 2000Date of Patent: June 18, 2002Assignee: United Microelectronics Corp.Inventors: Der-Yuan Wu, Jhy-Jeng Liu
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Patent number: 6338785Abstract: A method of protecting a cathode during the start-up procedure of an aluminum electrowinning cell where the cathode is optionally coated with an aluminium-wettable refractory material and when in use, aluminium is produced thereon. The start-up procedure comprises applying, before preheating the cell, one or more start-up layers in intimate contact on the aluminium-wettable refractory coating which form(s) a temporary protection against damage of chemical and/or mechanical origin to the aluminium-wettable coating; this temporary protection being eliminated before or during the initial normal cell operation. The temporary protection layers may be obtained from at least one pliable aluminium foil having a thickness of less than 0.1 mm and/or an applied aluminium-containing metallization, optionally in combination with inter alia a boron-containing solution, a polymer, a phosphates of aluminium-containing solution, or a colloid that gels while preheating the cell, or combinations thereof.Type: GrantFiled: April 13, 1999Date of Patent: January 15, 2002Assignee: Moltech Invent S.A.Inventors: Vittorio de Nora, Jainagesh Akkaraju Sekhar, Jean-Jacques Duruz, James Jeng Liu
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Patent number: 6281067Abstract: A self-aligned process for forming a silicide layer over word lines in DRAM and a silicide layer over transistors in a logic device region. A substrate that includes a memory cell region and a logic circuit region is provided. A first transistor and a second transistor are formed over the substrate. The first transistor is formed in the logic circuit region and includes a first gate conductive layer and a first source/drain region. The second transistor is formed in the memory cell region and includes a second gate conductive layer and a second source/drain region. A blocking layer is formed over both the first transistor and the second transistor. A portion of the blocking layer is removed to expose the first gate conductive layer, the first source/drain region and the second gate conductive layer. The remaining blocking layer still covers the second source/drain region. A metal silicide layer is formed over the first gate conductive layer, the first source/drain region and the second gate conductive layer.Type: GrantFiled: November 12, 1999Date of Patent: August 28, 2001Assignee: United Microelectronics Corp.Inventors: Sun-Chieh Chien, Hal Lee, Jhy-Jeng Liu, Wei-Wu Liao
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Patent number: 5801653Abstract: A current cell for converting a digital signal to an analog current signal is disclosed. The current cell includes a first PMOS transistor which receives the digital signal from a pre-stage processor by the gate. A drain of the first PMOS transistor is grounded. A second PMOS transistor has a source which is connected to the source of the first PMOS transistor, a gate which receives an inverse signal of the digital signal from the pre-stage processor, and a drain for providing the analog current signal. A third PMOS transistor is connected between a voltage source and the source of the first PMOS transistor. The third PMOS transistor has a gate to which a first reference voltage is applied.Type: GrantFiled: October 10, 1996Date of Patent: September 1, 1998Assignee: United Microelectronics CorporationInventors: Ding-Jeng Liu, Ying-Tzung Wang, Wen-Hsin Cheng