Abstract: A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a gate structure separating source and drain (S/D) features. The semiconductor device further includes a first dielectric layer formed over the substrate, the first dielectric layer including a first interconnect structure in electrical contact with the S/D features. The semiconductor device further includes an intermediate layer formed over the first dielectric layer, the intermediate layer having a top surface that is substantially coplanar with a top surface of the first interconnect structure. The semiconductor device further includes a second dielectric layer formed over the intermediate layer, the second dielectric layer including a second interconnect structure in electrical contact with the first interconnect structure and a third interconnect structure in electrical contact with the gate structure.