Abstract: A gas sensing method and a gas sensing system are provided. The gas sensing method includes using a gas sensing device to sense a target gas, the gas sensing device having a self-heating region capable of producing a change in resistance in response to the target gas being sensed by the gas sensing device, and controlling a change in supply of current or voltage to the gas sensing device according to the change in resistance, so that the gas sensing device is substantially maintained operating at a predetermined temperature for sensing the target gas.

Abstract: A gas sensing method and a gas sensing system are provided. The gas sensing method includes using a gas sensing device to sense a target gas, the gas sensing device having a self-heating region capable of producing a change in resistance in response to the target gas being sensed by the gas sensing device, and controlling a change in supply of current or voltage to the gas sensing device according to the change in resistance, so that the gas sensing device is substantially maintained operating at a predetermined temperature for sensing the target gas.

Abstract: A method for forming a nanodevice sensing chip includes forming nanodevices having a sensing region capable of producing localized Joule heating. Individual nanodevice is electrical-biased in a chemical vapor deposition (CVD) system or an atomic layer deposition (ALD) system enabling the sensing region of the nanodevice produce localized Joule heating and depositing sensing material only on this sensing region. A sensing chip is formed via nanodevices with sensing region of each nanodevice deposited various materials separately. The sensing chip is also functioned under device Joule self-heating to interact and detect the specific molecules.

Abstract: Provided is a biological sensing system, including a nanowire field-effect transistor and a sensing chip. A gate terminal of the nanowire FET surrounds a gate of a silicon nanowire or a gate of a silicon nanobelt, diameter of the silicon nanowire is less than 20 nm. A sensing electrode of the sensing chip is coupled to the gate terminal of the nanowire FET. An area ratio of an electrode area of the sensing electrode to a total sensing chip area, a thickness ratio of an oxide thickness of sensing electrode to a bulk oxide dielectric film thickness of the sensing chip and a capacitance ratio of an electrode capacitor of the sensing electrode to a gate capacitor of the silicon nanowire or a gate capacitor of the silicon nanobelt are optimized by means of an equivalent circuit so that potential coupling efficiency between sensing electrode and gate is optimized.

Abstract: A method for forming a nanodevice sensing chip includes forming nanodevices having a sensing region capable of producing localized Joule heating. Individual nanodevice is electrical-biased in a chemical vapor deposition (CVD) system or an atomic layer deposition (ALD) system enabling the sensing region of the nanodevice produce localized Joule heating and depositing sensing material only on this sensing region. A sensing chip is formed via nanodevices with sensing region of each nanodevice deposited various materials separately. The sensing chip is also functioned under device Joule self-heating to interact and detect the specific molecules.

Abstract: A method for forming a nanodevice sensing chip includes forming nanodevices having a sensing region capable of producing localized Joule heating. Individual nanodevice is electrical-biased in a chemical vapor deposition (CVD) system or an atomic layer deposition (ALD) system enabling the sensing region of the nanodevice produce localized Joule heating and depositing sensing material only on this sensing region. A sensing chip is formed via nanodevices with sensing region of each nanodevice deposited various materials separately. The sensing chip is also functioned under device Joule self-heating to interact and detect the specific molecules.

Abstract: A method for forming a nanodevice sensing chip includes forming nanodevices having a sensing region capable of producing localized Joule heating. Individual nanodevice is electrical-biased in a chemical vapor deposition (CVD) system or an atomic layer deposition (ALD) system enabling the sensing region of the nanodevice produce localized Joule heating and depositing sensing material only on this sensing region. A sensing chip is formed via nanodevices with sensing region of each nanodevice deposited various materials separately. The sensing chip is also functioned under device Joule self-heating to interact and detect the specific molecules.

Abstract: Provided is a biological sensing system, including a nanowire field-effect transistor and a sensing chip. A gate terminal of the nanowire FET surrounds a gate of a silicon nanowire or a gate of a silicon nanobelt, diameter of the silicon nanowire is less than 20 nm. A sensing electrode of the sensing chip is coupled to the gate terminal of the nanowire FET. An area ratio of an electrode area of the sensing electrode to a total sensing chip area, a thickness ratio of an oxide thickness of sensing electrode to a bulk oxide dielectric film thickness of the sensing chip and a capacitance ratio of an electrode capacitor of the sensing electrode to a gate capacitor of the silicon nanowire or a gate capacitor of the silicon nanobelt are optimized by means of an equivalent circuit so that potential coupling efficiency between sensing electrode and gate is optimized.

Abstract: The invention disclosed a sensing element integrating silicon nanowire gated-diodes with microfluidic channel, a manufacturing method and a detecting system thereof. The sensing element integrating silicon nanowire gated-diodes with a microfluidic channel includes a silicon nanowire gated-diode, a plurality of reference electrodes, a passivation layer and a microfluidic channel. The reference electrodes are formed on the silicon nanowire gated-diodes, and the passivation layer having a surface decorated with chemical materials is used for covering the silicon nanowire gated-diodes, and the microfluidic channel is connected with the passivation layer. When a detecting sample is connected or absorbed on the surface of the passivation layer, the sensing element integrating silicon nanowire gated-diodes with the microfluidic channel can detect an electrical signal change.

Abstract: A method for measuring an optoelectronic memory device, includes: grounding a source electrode of the optoelectronic memory device; applying a drain electrode voltage to a drain electrode of the optoelectronic memory device and measuring a first current at the drain electrode; using an optical source to illuminate the optoelectronic memory device and measure a first and a second current at the drain electrode; and comparing the sizes of the first current and the second current so as to judge the functional parameters of the optoelectronic memory device.

Abstract: The present invention provides an optoelectronic memory device, the method for manufacturing and evaluating the same. The optoelectronic memory device according to the present invention includes a substrate, an insulation layer, an active layer, source electrode and drain electrode. The substrate includes a gate, and the insulation layer is formed on the substrate. The active layer is formed on the insulation layer, and more particularly, the active layer is formed of a composite material comprising conjugated conductive polymers and quantum dots. Moreover, both of the source and the drain are formed on the insulation layer, and electrically connected to the active layer.

Abstract: The present invention provides an optoelectronic memory device, the method for manufacturing and evaluating the same. The optoelectronic memory device according to the present invention includes a substrate, an insulation layer, an active layer, source electrode and drain electrode. The substrate includes a gate, and the insulation layer is formed on the substrate. The active layer is formed on the insulation layer, and more particularly, the active layer is formed of a composite material comprising conjugated conductive polymers and quantum dots. Moreover, both of the source and the drain are formed on the insulation layer, and electrically connected to the active layer.

Abstract: The present invention provides an optoelectronic memory device, the method for manufacturing and evaluating the same. The optoelectronic memory device according to the present invention includes a substrate, an insulation layer, an active layer, source electrode and drain electrode. The substrate includes a gate, and the insulation layer is formed on the substrate. The active layer is formed on the insulation layer, and more particularly, the active layer is formed of a composite material comprising conjugated conductive polymers and quantum dots. Moreover, both of the source and the drain are formed on the insulation layer, and electrically connected to the active layer.

Abstract: The present invention provides an optoelectronic memory device, the method for manufacturing and evaluating the same. The optoelectronic memory device according to the present invention includes a substrate, an insulation layer, an active layer, source electrode and drain electrode. The substrate includes a gate, and the insulation layer is formed on the substrate. The active layer is formed on the insulation layer, and more particularly, the active layer is formed of a composite material comprising conjugated conductive polymers and quantum dots. Moreover, both of the source and the drain are formed on the insulation layer, and electrically connected to the active layer.

Abstract: The invention disclosed a sensing element integrating silicon nanowire gated-diodes with microfluidic channel, a manufacturing method and a detecting system thereof. The sensing element integrating silicon nanowire gated-diodes with a microfluidic channel comprises a silicon nanowire gated-diode, a plurality of reference electrodes, a passivation layer and a microfluidic channel. The reference electrodes are formed on the silicon nanowire gated-diodes, and the passivation layer having a surface decorated with chemical materials is used for covering the silicon nanowire gated-diodes, and the microfluidic channel is connected with the passivation layer. When a detecting sample is connected or absorbed on the surface of the passivation layer, the sensing element integrating silicon nanowire gated-diodes with the microfluidic channel can detect an electrical signal change.

Abstract: A sensing element includes a field-effect transistor (FET) with an ultra-thin channel, a reference electrode, a first and a second passivation layer, and a microchannel. The first and the second passivation layer enclose a first and a second portion of the FET, respectively. The microchannel is bonded to the first and the second passivation layer, such that the microchannel is extended across the channel of the ultra-thin channel FET. The ultra-thin channel has a chemically or physically modified surface. When an analyte to be tested passes through the microchannel and is in contact with the modified surface of the ultra-thin channel, it results in changes in the conductance of the ultra-thin channel FET. Trace detection may be conducted on the analyte by observing changes in the conductance. A method for manufacturing the sensing element and a biological detection system employing the sensing element are also provided.

Abstract: The present invention provides an optoelectronic memory device, the method for manufacturing and evaluating the same. The optoelectronic memory device according to the present invention includes a substrate, an insulation layer, an active layer, source electrode and drain electrode. The substrate includes a gate, and the insulation layer is formed on the substrate. The active layer is formed on the insulation layer, and more particularly, the active layer is formed of a composite material comprising conjugated conductive polymers and quantum dots. Moreover, both of the source and the drain are formed on the insulation layer, and electrically connected to the active layer.

Abstract: The invention relates to a method for directly patterning a low-k dielectric layer by a high energy flow without using any photoresist layer, so that the exposed portion of the low-k dielectric layer is cured and becomes insoluble to the developing solution. The unexposed portion of the low-k dielectric layer remains soluble to the developing solution and will be removed in the developing process. The performance and reliability of the devices are improved and the fabrication processes are simplified.

Abstract: The invention relates to a method for directly patterning a low-k dielectric layer by a high energy flow without using any photoresist layer, so that the exposed portion of the low-k dielectric layer is cured and becomes insoluble to the developing solution. The unexposed portion of the low-k dielectric layer remains soluble to the developing solution and will be removed in the developing process. The performance and reliability of the devices are improved and the fabrication processes are simplified.

Abstract: A membrane type integrated inductor includes an integrated inductor laid out on the upper plane of a membrane. The process to manufacture a membrane type integrated inductor includes the following steps: forming a thin dielectric layer at the outer portion of a substrate; forming a wire-wound integrated inductor thin dielectric layer with the known technique; defining an open window on the back of the substrate below the inductor through the backside etch; and forming a membrane type integrated inductor by using the thin dielectric layer on the silicon substrate as the etching stop. One embodiment uses silicon dioxide as the membrane layer. The low dielectric constant of SiO.sub.2 may be used to lower the power loss during the lay out of the circuit parts, to effectively raise the induction value, to lower the parasitic capacitance, to increase the resonance frequency, to decrease the volume of the chip which the inductor utilized, and to raise the quality factor.