Patents by Inventor Jeng-Wei Yu
Jeng-Wei Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11948971Abstract: A method includes forming isolations extending into a semiconductor substrate, recessing the isolation regions, wherein a semiconductor region between the isolation regions forms a semiconductor fin, forming a first dielectric layer on the isolation regions and the semiconductor fin, forming a second dielectric layer over the first dielectric layer, planarizing the second dielectric layer and the first dielectric layer, and recessing the first dielectric layer. A portion of the second dielectric layer protrudes higher than remaining portions of the first dielectric layer to form a protruding dielectric fin. A portion of the semiconductor fin protrudes higher than the remaining portions of the first dielectric layer to form a protruding semiconductor fin. A portion of the protruding semiconductor fin is recessed to form a recess, from which an epitaxy semiconductor region is grown. The epitaxy semiconductor region expands laterally to contact a sidewall of the protruding dielectric fin.Type: GrantFiled: August 10, 2021Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jeng-Wei Yu, Tsz-Mei Kwok, Tsung-Hsi Yang, Li-Wei Chou, Ming-Hua Yu
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Patent number: 11908742Abstract: A semiconductor device and method of forming the same is disclosed. The semiconductor device includes a semiconductor substrate, a first fin and a second fin extending from the semiconductor substrate, a first lower semiconductor feature over the first fin, a second lower semiconductor feature over the second fin. Each of the first and second lower semiconductor features includes a top surface bending downward towards the semiconductor substrate in a cross-sectional plane perpendicular to a lengthwise direction of the first and second fins. The semiconductor device also includes an upper semiconductor feature over and in physical contact with the first and second lower semiconductor features, and a dielectric layer on sidewalls of the first and second lower semiconductor features.Type: GrantFiled: June 14, 2021Date of Patent: February 20, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Jing Lee, Jeng-Wei Yu, Li-Wei Chou, Tsz-Mei Kwok, Ming-Hua Yu
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Patent number: 11652105Abstract: A method includes forming a gate stack on a first portion of a semiconductor fin, removing a second portion of the semiconductor fin to form a recess, and forming a source/drain region starting from the recess. The formation of the source/drain region includes performing a first epitaxy process to grow a first semiconductor layer, wherein the first semiconductor layer has straight-and-vertical edges, and performing a second epitaxy process to grow a second semiconductor layer on the first semiconductor layer. The first semiconductor layer and the second semiconductor layer are of a same conductivity type.Type: GrantFiled: January 7, 2021Date of Patent: May 16, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jung-Chi Tai, Yi-Fang Pai, Tsz-Mei Kwok, Tsung-Hsi Yang, Jeng-Wei Yu, Cheng-Hsiung Yen, Jui-Hsuan Chen, Chii-Horng Li, Yee-Chia Yeo, Heng-Wen Ting, Ming-Hua Yu
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Publication number: 20220415715Abstract: A method of forming a fin field-effect transistor device includes: forming a gate structure over a first fin and a second fin; forming, on a first side of the gate structure, a first recess and a second recess in the first fin and the second fin, respectively; and forming a source/drain region in the first and second recesses, which includes: forming a barrier layer in the first and second recesses; forming a first epitaxial material over the barrier layer, where a first portion of the first epitaxial material over the first fin is spaced apart from a second portion of the first epitaxial material over the second fin; forming a second epitaxial material over the first and second portions of the first epitaxial material, where the second epitaxial material extends continuously from the first fin to the second fin; and forming a capping layer over the second epitaxial material.Type: ApplicationFiled: September 30, 2021Publication date: December 29, 2022Inventors: Jeng-Wei Yu, Yi-Fang Pai, Pei-Ren Jeng, Chii-Horng Li, Yee-Chia Yeo
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Publication number: 20220384437Abstract: A method includes forming a gate stack on a first portion of a semiconductor fin, removing a second portion of the semiconductor fin to form a recess, and forming a source/drain region starting from the recess. The formation of the source/drain region includes performing a first epitaxy process to grow a first semiconductor layer, wherein the first semiconductor layer has straight-and-vertical edges, and performing a second epitaxy process to grow a second semiconductor layer on the first semiconductor layer. The first semiconductor layer and the second semiconductor layer are of a same conductivity type.Type: ApplicationFiled: August 9, 2022Publication date: December 1, 2022Inventors: Jung-Chi Tai, Yi-Fang Pai, Tsz-Mei Kwok, Tsung-Hsi Yang, Jeng-Wei Yu, Cheng-Hsiung Yen, Jui-Hsuan Chen, Chii-Horng Li, Yee-Chia Yeo, Heng-Wen Ting, Ming-Hua Yu
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Publication number: 20220336640Abstract: A method includes forming a semiconductor fin protruding higher than a top surface of an isolation region. The semiconductor fin overlaps a semiconductor strip, and the semiconductor strip contacts the isolation region. The method further includes forming a gate stack on a sidewall and a top surface of a first portion of the semiconductor fin, and etching the semiconductor fin and the semiconductor strip to form a trench. The trench has an upper portion in the semiconductor fin and a lower portion in the semiconductor strip. A semiconductor region is grown in the lower portion of the trench. Process gases used for growing the semiconductor region are free from both of n-type dopant-containing gases and p-type dopant-containing gases. A source/drain region is grown in the upper portion of the trench, wherein the source/drain region includes a p-type or an n-type dopant.Type: ApplicationFiled: June 18, 2021Publication date: October 20, 2022Inventors: Meng-Ku Chen, Ji-Yin Tsai, Jeng-Wei Yu, Yi-Fang Pai, Pei-Ren Jeng, Yee-Chia Yeo, Chii-Horng Li
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Publication number: 20220181440Abstract: A method of forming a semiconductor device includes depositing a p-type semiconductor layer over a portion of a semiconductor substrate, depositing a semiconductor layer over the p-type semiconductor layer, wherein the semiconductor layer is free from p-type impurities, forming a gate stack directly over a first portion of the semiconductor layer, and etching a second portion of the semiconductor layer to form a trench extending into the semiconductor layer. At least a surface of the p-type semiconductor layer is exposed to the trench. A source/drain region is formed in the trench. The source/drain region is of n-type.Type: ApplicationFiled: February 21, 2022Publication date: June 9, 2022Inventors: Tsung-Hsi Yang, Ming-Hua Yu, Jeng-Wei Yu
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Patent number: 11257908Abstract: A method of forming a semiconductor device includes depositing a p-type semiconductor layer over a portion of a semiconductor substrate, depositing a semiconductor layer over the p-type semiconductor layer, wherein the semiconductor layer is free from p-type impurities, forming a gate stack directly over a first portion of the semiconductor layer, and etching a second portion of the semiconductor layer to form a trench extending into the semiconductor layer. At least a surface of the p-type semiconductor layer is exposed to the trench. A source/drain region is formed in the trench. The source/drain region is of n-type.Type: GrantFiled: August 16, 2019Date of Patent: February 22, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Hsi Yang, Ming-Hua Yu, Jeng-Wei Yu
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Publication number: 20220028856Abstract: A method includes forming a gate stack on a first portion of a semiconductor fin, removing a second portion of the semiconductor fin to form a recess, and forming a source/drain region starting from the recess. The formation of the source/drain region includes performing a first epitaxy process to grow a first semiconductor layer, wherein the first semiconductor layer has straight-and-vertical edges, and performing a second epitaxy process to grow a second semiconductor layer on the first semiconductor layer. The first semiconductor layer and the second semiconductor layer are of a same conductivity type.Type: ApplicationFiled: January 7, 2021Publication date: January 27, 2022Inventors: Jung-Chi Tai, Yi-Fang Pai, Tsz-Mei Kwok, Tsung-Hsi Yang, Jeng-Wei Yu, Cheng-Hsiung Yen, Jui-Hsuan Chen, Chii-Horng Li, Yee-Chia Yeo, Heng-Wen Ting, Ming-Hua Yu
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Publication number: 20210376073Abstract: A method includes forming isolations extending into a semiconductor substrate, recessing the isolation regions, wherein a semiconductor region between the isolation regions forms a semiconductor fin, forming a first dielectric layer on the isolation regions and the semiconductor fin, forming a second dielectric layer over the first dielectric layer, planarizing the second dielectric layer and the first dielectric layer, and recessing the first dielectric layer. A portion of the second dielectric layer protrudes higher than remaining portions of the first dielectric layer to form a protruding dielectric fin. A portion of the semiconductor fin protrudes higher than the remaining portions of the first dielectric layer to form a protruding semiconductor fin. A portion of the protruding semiconductor fin is recessed to form a recess, from which an epitaxy semiconductor region is grown. The epitaxy semiconductor region expands laterally to contact a sidewall of the protruding dielectric fin.Type: ApplicationFiled: August 10, 2021Publication date: December 2, 2021Inventors: Jeng-Wei Yu, Tsz-Mei Kwok, Tsung-Hsi Yang, Li-Wei Chou, Ming-Hua Yu
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Publication number: 20210313230Abstract: A semiconductor device and method of forming the same is disclosed. The semiconductor device includes a semiconductor substrate, a first fin and a second fin extending from the semiconductor substrate, a first lower semiconductor feature over the first fin, a second lower semiconductor feature over the second fin. Each of the first and second lower semiconductor features includes a top surface bending downward towards the semiconductor substrate in a cross-sectional plane perpendicular to a lengthwise direction of the first and second fins. The semiconductor device also includes an upper semiconductor feature over and in physical contact with the first and second lower semiconductor features, and a dielectric layer on sidewalls of the first and second lower semiconductor features.Type: ApplicationFiled: June 14, 2021Publication date: October 7, 2021Inventors: Yi-Jing Lee, Jeng-Wei Yu, Li-Wei Chou, Tsz-Mei Kwok, Ming-Hua Yu
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Patent number: 11101347Abstract: A method includes forming isolations extending into a semiconductor substrate, recessing the isolation regions, wherein a semiconductor region between the isolation regions forms a semiconductor fin, forming a first dielectric layer on the isolation regions and the semiconductor fin, forming a second dielectric layer over the first dielectric layer, planarizing the second dielectric layer and the first dielectric layer, and recessing the first dielectric layer. A portion of the second dielectric layer protrudes higher than remaining portions of the first dielectric layer to form a protruding dielectric fin. A portion of the semiconductor fin protrudes higher than the remaining portions of the first dielectric layer to form a protruding semiconductor fin. A portion of the protruding semiconductor fin is recessed to form a recess, from which an epitaxy semiconductor region is grown. The epitaxy semiconductor region expands laterally to contact a sidewall of the protruding dielectric fin.Type: GrantFiled: July 1, 2019Date of Patent: August 24, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jeng-Wei Yu, Tsz-Mei Kwok, Tsung-Hsi Yang, Li-Wei Chou, Ming-Hua Yu
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Patent number: 11037826Abstract: A semiconductor device and method of forming the same is disclosed. The semiconductor device includes a semiconductor substrate, a first fin and a second fin extending from the semiconductor substrate, a first lower semiconductor feature directly over the first fin, and a second lower semiconductor feature directly over the second fin. Each of the first and second lower semiconductor features includes a top surface bending downward towards the semiconductor substrate. The semiconductor also further includes an upper semiconductor feature directly over and in physical contact with the first and second lower semiconductor features. The semiconductor device further includes a dielectric layer on sidewalls of the first and second lower semiconductor features.Type: GrantFiled: January 27, 2020Date of Patent: June 15, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Jing Lee, Jeng-Wei Yu, Li-Wei Chou, Tsz-Mei Kwok, Ming-Hua Yu
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Patent number: 10879128Abstract: A semiconductor device includes a first semiconductor fin extending from a substrate, a first dielectric fin extending from the substrate adjacent a first side of the first semiconductor fin and a second dielectric fin extending from the substrate adjacent a second side of the first semiconductor fin, a first gate stack over and along sidewalls of the first semiconductor fin, the first dielectric fin, and the second dielectric fin, a first epitaxial source/drain region in the first semiconductor fin and extending from the first dielectric fin to the second dielectric fin, and an air gap between the first epitaxial source/drain region and the substrate, the air gap extending between the first dielectric fin and the second dielectric fin.Type: GrantFiled: August 2, 2019Date of Patent: December 29, 2020Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsz-Mei Kwok, Tsung-Hsi Yang, Jeng-Wei Yu, Li-Wei Chou, Ming-Hua Yu, Chii-Horng Li
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Publication number: 20200176560Abstract: A method includes forming isolations extending into a semiconductor substrate, recessing the isolation regions, wherein a semiconductor region between the isolation regions forms a semiconductor fin, forming a first dielectric layer on the isolation regions and the semiconductor fin, forming a second dielectric layer over the first dielectric layer, planarizing the second dielectric layer and the first dielectric layer, and recessing the first dielectric layer. A portion of the second dielectric layer protrudes higher than remaining portions of the first dielectric layer to form a protruding dielectric fin. A portion of the semiconductor fin protrudes higher than the remaining portions of the first dielectric layer to form a protruding semiconductor fin. A portion of the protruding semiconductor fin is recessed to form a recess, from which an epitaxy semiconductor region is grown. The epitaxy semiconductor region expands laterally to contact a sidewall of the protruding dielectric fin.Type: ApplicationFiled: July 1, 2019Publication date: June 4, 2020Inventors: Jeng-Wei Yu, Tsz-Mei Kwok, Tsung-Hsi Yang, Li-Wei Chou, Ming-Hua Yu
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Publication number: 20200161185Abstract: A semiconductor device and method of forming the same is disclosed. The semiconductor device includes a semiconductor substrate, a first fin and a second fin extending from the semiconductor substrate, a first lower semiconductor feature directly over the first fin, and a second lower semiconductor feature directly over the second fin. Each of the first and second lower semiconductor features includes a top surface bending downward towards the semiconductor substrate. The semiconductor also further includes an upper semiconductor feature directly over and in physical contact with the first and second lower semiconductor features. The semiconductor device further includes a dielectric layer on sidewalls of the first and second lower semiconductor features.Type: ApplicationFiled: January 27, 2020Publication date: May 21, 2020Inventors: Yi-Jing Lee, Jeng-Wei Yu, Li-Wei Chou, Tsz-Mei Kwok, Ming-Hua Yu
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Publication number: 20200135861Abstract: A method of forming a semiconductor device includes depositing a p-type semiconductor layer over a portion of a semiconductor substrate, depositing a semiconductor layer over the p-type semiconductor layer, wherein the semiconductor layer is free from p-type impurities, forming a gate stack directly over a first portion of the semiconductor layer, and etching a second portion of the semiconductor layer to form a trench extending into the semiconductor layer. At least a surface of the p-type semiconductor layer is exposed to the trench. A source/drain region is formed in the trench. The source/drain region is of n-type.Type: ApplicationFiled: August 16, 2019Publication date: April 30, 2020Inventors: Tsung-Hsi Yang, Ming-Hua Yu, Jeng-Wei Yu
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Publication number: 20200075423Abstract: A semiconductor device includes a first semiconductor fin extending from a substrate, a first dielectric fin extending from the substrate adjacent a first side of the first semiconductor fin and a second dielectric fin extending from the substrate adjacent a second side of the first semiconductor fin, a first gate stack over and along sidewalls of the first semiconductor fin, the first dielectric fin, and the second dielectric fin, a first epitaxial source/drain region in the first semiconductor fin and extending from the first dielectric fin to the second dielectric fin, and an air gap between the first epitaxial source/drain region and the substrate, the air gap extending between the first dielectric fin and the second dielectric fin.Type: ApplicationFiled: August 2, 2019Publication date: March 5, 2020Inventors: Tsz-Mei Kwok, Tsung-Hsi Yang, Jeng-Wei Yu, Li-Wei Chou, Ming-Hua Yu, Chii-Horng Li
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Patent number: 10546784Abstract: A semiconductor device and method of forming the same is disclosed. The semiconductor device includes a substrate, two semiconductor fins over the substrate, and a semiconductor feature over the two semiconductor fins. The semiconductor feature comprises two lower portions and one upper portion. The two lower portions are directly over the two semiconductor fins respectively. The upper portion is over the two lower portions. A bottom surface of the upper portion has an arc-like cross-sectional shape.Type: GrantFiled: July 31, 2018Date of Patent: January 28, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Jing Lee, Jeng-Wei Yu, Li-Wei Chou, Tsz-Mei Kwok, Ming-Hua Yu
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Publication number: 20180350687Abstract: A semiconductor device and method of forming the same is disclosed. The semiconductor device includes a substrate, two semiconductor fins over the substrate, and a semiconductor feature over the two semiconductor fins. The semiconductor feature comprises two lower portions and one upper portion. The two lower portions are directly over the two semiconductor fins respectively. The upper portion is over the two lower portions. A bottom surface of the upper portion has an arc-like cross-sectional shape.Type: ApplicationFiled: July 31, 2018Publication date: December 6, 2018Inventors: Yi-Jing Lee, Jeng-Wei Yu, Li-Wei Chou, Tsz-Mei Kwok, Ming-Hua Yu