Abstract: An electronic package is provided, in which a first electronic module and a second electronic module are stacked via a plurality of first conductive structures and a plurality of second conductive structures, and the amount of solder of the first conductive structures is greater than the amount of solder of the second conductive structures, such that the electronic package can be configured with the first conductive structures and the second conductive structures according to the degree of warpage of the electronic package, so as to effectively disperse the stress to avoid the problem of warpage.

Abstract: A self-powered piezoelectric energy harvesting microsystem device has CMOS integrated circuit elements, contacts and interconnections formed at a proof mass portion of a die region of a semiconductor wafer. Piezoelectric energy harvesting unit components connected to the integrated circuit elements are formed at a thinned beam portion of the die region that connects the proof mass portion for vibration relative to a surrounding anchor frame portion. A battery provided on the proof mass portion connects to the integrated circuit elements. In a cantilever architectural example, the battery is advantageously located at a distal end of the proof mass portion, opposite the joinder with frame portion via the beam portion.

Abstract: A self-powered piezoelectric energy harvesting microsystem device has CMOS integrated circuit elements, contacts and interconnections formed at a proof mass portion of a die region of a semiconductor wafer. Piezoelectric energy harvesting unit components connected to the integrated circuit elements are formed at a thinned beam portion of the die region that connects the proof mass portion for vibration relative to a surrounding anchor frame portion. A battery provided on the proof mass portion connects to the integrated circuit elements. In a cantilever architectural example, the battery is advantageously located at a distal end of the proof mass portion, opposite the joinder with frame portion via the beam portion.

Abstract: A self-powered piezoelectric energy harvesting microsystem device has CMOS integrated circuit elements, contacts and interconnections formed at a proof mass portion of a die region of a semiconductor wafer. Piezoelectric energy harvesting unit components connected to the integrated circuit elements are formed at a thinned beam portion of the die region that connects the proof mass portion for vibration relative to a surrounding anchor frame portion. A battery provided on the proof mass portion connects to the integrated circuit elements. In a cantilever architectural example, the battery is advantageously located at a distal end of the proof mass portion, opposite the joinder with frame portion via the beam portion.

Abstract: A piezoelectric energy harvester device has a cantilevered structure with a rectangular proof mass portion defined by holes through a substrate along three sides of a proof mass portion and supported by a thinned hinge portion for free pivotal movement relative to an anchor portion. Elongated strips of piezoelectric energy harvesting units are formed in side-by-side spaced positions on the hinge portion and aligned parallel or perpendicular to a stress direction. Multiplexing electronics coupled to contact pads on the anchor portion selectively connects different strip combinations to power management circuitry, responsive to variations in vibration magnitude or modes.

Abstract: A piezoelectric energy harvester device has a cantilevered structure with a rectangular proof mass portion defined by holes through a substrate along three sides of a proof mass portion and supported by a thinned hinge portion for free pivotal movement relative to an anchor portion. Elongated strips of piezoelectric energy harvesting units are formed in side-by-side spaced positions on the hinge portion and aligned parallel or perpendicular to a stress direction. Multiplexing electronics coupled to contact pads on the anchor portion selectively connects different strip combinations to power management circuitry, responsive to variations in vibration magnitude or modes.

Abstract: A self-powered piezoelectric energy harvesting microsystem device has CMOS integrated circuit elements, contacts and interconnections formed at a proof mass portion of a die region of a semiconductor wafer. Piezoelectric energy harvesting unit components connected to the integrated circuit elements are formed at a thinned beam portion of the die region that connects the proof mass portion for vibration relative to a surrounding anchor frame portion. A battery provided on the proof mass portion connects to the integrated circuit elements. In a cantilever architectural example, the battery is advantageously located at a distal end of the proof mass portion, opposite the joinder with frame portion via the beam portion.

Abstract: The present invention discloses a unitized charging and discharging battery management system and a programmable battery management module thereof The unitized charging and discharging battery management system includes a smart battery module and a programmable battery management module, which has a universal loop and a control unit. The smart battery module has at least two smart batteries which are electrically connected by a plurality of switches and circuits of the universal loop to form a charging/discharging loop in series/parallel. The control unit monitors the charging and discharging status of the smart batteries to turn on or off the switches accordingly, so as to manage the smart batteries, thereby enhancing the overall power efficacy of the smart battery module. Besides, the service life of the smart battery module is also prolonged due to the simultaneous charging and discharging capability.

Abstract: A substrate processing method practiced in a plasma sputter reactor including an RF coil and two or more coaxial electromagnets, at least two of which are wound at different radii. After a barrier layer, for example, of tantalum is sputter deposited into a via hole, the RF coil is powered to cause argon sputter etching of the barrier layer and the current to the electromagnets are adjusted to steer the argon ions, for example to eliminate sidewall asymmetry. For example, the two electromagnets are powered with unequal currents of opposite polarities or a third electromagnet wrapped at a different height is powered. In one embodiment, the steering straightens the trajectories near the wafer edge. In another embodiment, the etching is divided into two steps in which the steering inclines the trajectories at opposite angles. The invention may also be applied to other materials, such as copper.

Abstract: A fabrication method and a product for the deposition of a conductive barrier or other liner layer in a vertical electrical interconnect structure. One embodiment includes within a a hole through a dielectric layer a barrier layer of RuTaN, an adhesion layer of RuTa, and a copper seed layer forming a liner for electroplating of copper. The ruthenium content is preferably greater than 50 at % and more preferably at least 80 at % but less than 95 at %. The barrier and adhesion layers may both be sputter deposited. Other platinum-group elements substitute for the ruthenium and other refractory metals substitute for the tantalum. Aluminum alloying into RuTa when annealed presents a moisture barrier. Copper contacts include different alloying fractions of RuTa to shift the work function to the doping type.

Abstract: A fabrication method, a product structure, a fabrication method, and a sputtering target for the deposition of a conductive barrier or other liner layer in an interconnect structure. The barrier layer comprises a conductive metal of a refractory noble metal alloy, such as a ruthenium/tantalum alloy, which may be amorphous though it is not required to be so. The barrier layer may be sputtered from a target of similar composition. The barrier and target composition may be chosen from a combination of the refractory metals and the platinum-group metals as well as RuTa. A copper noble seed layer may be formed of an alloy of copper and ruthenium in contact to a barrier layer over the dielectric.

Abstract: A dual-use electric plug including a base having vertical receiving chamber and a horizontal side hole, two blades fixedly and perpendicularly fastened to the front side of base for connection to the black wire and the white wire, a grounding prong supported on a spring inside the vertical receiving chamber and moved between the working position outside the vertical receiving chamber for connection to the grounding wire, and the non-working position inside the vertical receiving chamber, and a spring-supported press bar to hold the grounding prong in the working position, wherein the grounding prong can be moved back inside the vertical receiving chamber and retained in the non-working position by depressing the press bar and then releasing it.