Patents by Inventor Jennifer Gerbi

Jennifer Gerbi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9399816
    Abstract: This invention relates to a method of refurbishing sputter targets comprising: providing a sputter target comprising a temperature sensitive alloy, having regions depleted of material; providing a powder having a first phase comprising the desired temperature sensitive alloy onto the surface; and pressing the powder onto the surface to form a refurbished target, at temperatures lower than that which would damage the temperature sensitive alloy.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: July 26, 2016
    Assignee: Dow Global Technologies LLC
    Inventors: Jennifer Gerbi, Robert Nilsson
  • Publication number: 20130248351
    Abstract: This invention relates to a method of refurbishing sputter targets comprising: providing a sputter target comprising a temperature sensitive alloy, having regions depleted of material; providing a powder having a first phase comprising the desired temperature sensitive alloy onto the surface; and pressing the powder onto the surface to form a refurbished target, at temperatures lower than that which would damage the temperature sensitive alloy.
    Type: Application
    Filed: October 13, 2011
    Publication date: September 26, 2013
    Applicant: Dow Global Technologie, LLC.
    Inventors: Jennifer Gerbi, Robert Nilsson
  • Patent number: 7791201
    Abstract: A device including a layered heterostructure with an oxygen-containing material, with a carbon layer and an amorphous oxygen diffusion barrier protecting the carbon layer from etching by oxygen. One or more of a metal, a carbide or an oxide may be in contact with the amorphous oxygen diffusion barrier that has the lowest free energy of oxide formation in the device. Various devices are disclosed as are varieties of carbon allotropes. Methods of protecting carbon, such as diamond from the oxygen etching in processes such as device manufacture are also disclosed.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: September 7, 2010
    Assignee: UChicago Argonne, LLC
    Inventors: Orlando Auciello, John Carlisle, Jennifer Gerbi, James Birrell
  • Publication number: 20080246368
    Abstract: A device including a layered heterostructure with an oxygen-containing material, with a carbon layer and an amorphous oxygen diffusion barrier protecting the carbon layer from etching by oxygen. One or more of a metal, a carbide or an oxide may be in contact with the amorphous oxygen diffusion barrier that has the lowest free energy of oxide formation in the device. Various devices are disclosed as are varieties of carbon allotropes. Methods of protecting carbon, such as diamond from the oxygen etching in processes such as device manufacture are also disclosed.
    Type: Application
    Filed: November 30, 2006
    Publication date: October 9, 2008
    Applicant: UChicago Argonne, LLC
    Inventors: Orlando Auciello, John Carlisle, Jennifer Gerbi, James Birrell
  • Patent number: 7394103
    Abstract: A substantially all diamond transistor with an electrically insulating substrate, an electrically conductive diamond layer on the substrate, and a source and a drain contact on the electrically conductive diamond layer. An electrically insulating diamond layer is in contact with the electrically conductive diamond layer, and a gate contact is on the electrically insulating diamond layer. The diamond layers may be homoepitaxial, polycrystalline, nanocrystalline or ultrananocrystalline in various combinations. A method of making a substantially all diamond self-aligned gate transistor is disclosed in which seeding and patterning can be avoided or minimized, if desired.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: July 1, 2008
    Assignee: UChicago Argonne, LLC
    Inventor: Jennifer Gerbi
  • Publication number: 20060060864
    Abstract: A substantially all diamond transistor with an electrically insulating substrate, an electrically conductive diamond layer on the substrate, and a source and a drain contact on the electrically conductive diamond layer. An electrically insulating diamond layer is in contact with the electrically conductive diamond layer, and a gate contact is on the electrically insulating diamond layer. The diamond layers may be homoepitaxial, polycrystalline, nanocrystalline or ultrananocrystalline in various combinations. A method of making a substantially all diamond self-aligned gate transistor is disclosed in which seeding and patterning can be avoided or minimized, if desired.
    Type: Application
    Filed: September 13, 2005
    Publication date: March 23, 2006
    Applicant: The University of Chicago
    Inventor: Jennifer Gerbi