Patents by Inventor Jennifer R. Sweterlitsch

Jennifer R. Sweterlitsch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Stacked package for integrated circuits
    Patent number: 6893897
    Abstract: A space-saving integrated circuit package employs two printed circuit boards joined together, the upper board having an integrated circuit attached by flip-chip technology and the lower board having a cavity for holding an integrated circuit that is located beneath the upper integrated circuit, the lower integrated circuit being bonded to the bottom of the upper board below the upper integrated circuit and electrically connected to wiring on the lower surface of the lower board by wire bond connections.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: May 17, 2005
    Assignee: International Business Machines Corporation
    Inventor: Jennifer R. Sweterlitsch
  • Stacked package for integrated circuits
    Publication number: 20040183181
    Abstract: A space-saving integrated circuit package employs two printed circuit boards joined together, the upper board having an integrated circuit attached by flip-chip technology and the lower board having a cavity for holding an integrated circuit that is located beneath the upper integrated circuit, the lower integrated circuit being bonded to the bottom of the upper board below the upper integrated circuit and electrically connected to wiring on the lower surface of the lower board by wire bond connections.
    Type: Application
    Filed: January 29, 2004
    Publication date: September 23, 2004
    Applicant: International Business Machines Corporation
    Inventor: Jennifer R. Sweterlitsch
  • Stacked package for integrated circuits
    Patent number: 6737742
    Abstract: A space-saving integrated circuit package employs two printed circuit boards joined together, the upper board having an integrated circuit attached by flip-chip technology and the lower board having a cavity for holding an integrated circuit that is located beneath the upper integrated circuit, the lower integrated circuit being bonded to the bottom of the upper board below the upper integrated circuit and electrically connected to wiring on the lower surface of the lower board by wire bond connections.
    Type: Grant
    Filed: September 11, 2002
    Date of Patent: May 18, 2004
    Assignee: International Business Machines Corporation
    Inventor: Jennifer R. Sweterlitsch
  • Stacked package for integrated circuits
    Publication number: 20040046239
    Abstract: A space-saving integrated circuit package employs two printed circuit boards joined together, the upper board having an integrated circuit attached by flip-chip technology and the lower board having a cavity for holding an integrated circuit that is located beneath the upper integrated circuit, the lower integrated circuit being bonded to the bottom of the upper board below the upper integrated circuit and electrically connected to wiring on the lower surface of the lower board by wire bond connections.
    Type: Application
    Filed: September 11, 2002
    Publication date: March 11, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Jennifer R. Sweterlitsch