Abstract: An asymmetric sense amplifier is disclosed for use with single-ended memory arrays. The sense amplifier has a bit input, a reference input, an enable input, and bistable output circuitry. The reference input may simply be tied to V.sub.DD. The bistable output circuitry includes first and second output nodes disposed between first and second pull-up/pull-down paths, respectively. The first pull-up and pull-down paths may include first pull-up and pull-down FET channels, respectively. The second pull-up and pull-down paths may include second pull-up and pull-down FET channels, respectively. The bistable output circuitry is operable to be stable in first and second states. In both states, the output nodes are at opposite potentials. The sense amplifier is asymmetrical in the following sense: Either the second pull-down FET channel is wider than the first pull-down FET channel, or the first pull-up FET channel is wider than the second pull-up FET channel, or both.