Abstract: A method for electrochemically etching a metal layer deposited on a dielectric with an etch resist layer pattern to form circuitry for high density interconnect electronic modules using a nonactive electrolyte solution is described. The method is particularly useful for printed wiring boards, chip scale packages, wafer level packages and the like. The circuit tracks generally range from 50 to 125 micrometers for printed wiring boards, from 5 to 50 micrometers for chip scale packages, and from 0.1 to 5 micrometers for wafer level packages. In one embodiment of the invention the metal layer is copper and the nonactive electrolyte solution is a mixture of sodium nitrate and sodium chloride and a pulse electric current is employed to accomplish the electrochemical etching.

Abstract: A method and apparatus for establishing more uniform deposition across one or more faces of a workpiece in an electroplating process. The apparatus employs eductors in conjunction with a flow dampener member and other measures to provide a more uniform current distribution and a more uniform metal deposit distribution as reflected in a coefficient of variability that is lower than conventional processes.

Abstract: A method for electrochemically etching a metal layer deposited on a dielectric with an etch resist layer pattern to form circuitry for high density interconnect electronic modules using a nonactive electrolyte solution is described. The method is particularly useful for printed wiring boards, chip scale packages, wafer level packages and the like. The circuit tracks generally range from 50 to 125 micrometers for printed wiring boards, from 5 to 50 micrometers for chip scale packages, and from 0.1 to 5 micrometers for wafer level packages. In one embodiment of the invention the metal layer is copper and the nonactive electrolyte solution is a mixture of sodium nitrate and sodium chloride and a pulse electric current is employed to accomplish the electrochemical etching.