Abstract: Semiconductor component, including a semiconductor body having an edge, a surface, a substrate of a first given conductivity type, at least one zone being embedded in a planar manner in the substrate at the surface and being of a second conductivity type opposite the first given type, and insulating layer disposed on the surface, an electrode being in contact with the at least one zone, a channel stopper disposed on the insulating layer outside the at least one zone and in vicinity of the edge of the semiconductor body, the channel stopper being electrically connected to the substrate, and a field plate beind disposed on the insulating layer between the at least one zone and the channel stopper and being electrically connected to the at least one zone, the channel stopper being disposed at an increasing distance from the edge and the surface of the semiconductor body, as seen in direction toward the at least one zone.

Abstract: A semiconductor component with a power MOSFET and control circuit for controlling the power MOSFET. Both the power MOSFET and the control circuit have separate semiconductor bodies. The semiconductor body of the control circuit is arranged on one of the main surfaces of the semiconductor body of the power MOSFET. The control circuit is electrically insulated from the MOSFET by an insulating layer and mechanically coupled to the MOSFET by means of a bonding layer. The MOSFET is fastened to a cooling body which serves as a heat sink for the semiconductor component. The terminals of the control circuit and the MOSFET are attached to housing connections with leads.

Abstract: An integrated circuit for protecting subscriber lines against overvoltages includes a semiconductor body; a field-controllable thyristor having a gate electrode, an anode electrode and a cathode electrode, the gate electrode being insulated from the semiconductor body; a resistor connected between the cathode electrode and the gate electrode; a series circuit of Zener diodes connected between the gate electrode and the anode electrode, each of the Zener diodes having an anode electrode and a cathode electrode; and short circuit jumpers each being connected between the anode electrode and the cathode electrode of a respective one of at least part of the Zener diodes; at least part of the jumpers being interrupted corresponding to a predetermined breakdown voltage of the series circuit; and the thyristor having a larger breakdown voltage than the combined breakdown voltages of the Zener diodes of the series circuit of Zener diodes.

Abstract: MIS-FET assembly, including a first MIS-FET having a semiconductor substrate of a first conductivity type with first and second surfaces, at least one channel zone of a second conductivity type opposite the first conductivity type being embedded in the first surface of the substrate, a source zone of the first conductivity type being embedded in the channel zone, a drain zone adjoining the first surface of the substrate, a drain electrode connected to the second surface of the substrate, an insulating layer disposed on the first surface of the substrate, at least one gate electrode disposed on the insulating layer, and at least one injector zone of the second conductivity type being embedded in the first surface of the substrate defining a pn-junction between the injector zone and the drain zone being disposed under the at least one gate electrode, and a second MIS-FET having a gate electrode and having a source and drain electrodes defining a source-drain path being connected between the injector zone of the

Abstract: Planar semiconductor component which has a substrate of one conduction type, and a contact-connected zone of opposite conductivity type embedded in the surface of the substrate in planar fashion and having a part thereof emerging to the surface. It also has a control electrode covering that part of the contact-connected contacted zone which emerges to the surface, an insulating layer on the surface, an edge electrode seated on the insulating layer at the edge of the substrate and electrically connected to the substrate, and at least one protective ring zone of the opposite conductivity type positioned between the edge of the substrate and the contact-connected zone and embedded in planar fashion in the surface.

Abstract: A power FET is preceded by an input amplifier consisting of a second FET of the same channel type and a third FET of an opposite channel type. The FETs of the pre-amplifier can be integrated into the chip of the power FET without additional production steps if the power FET and the second FET are designed as vertical FETs and the third FET as a lateral FET. Through this semiconductor device, the relatively high input capacitance of power MISFETs, which results in slow switching speeds when driven by standard ICs, is overcome.

Abstract: MIS-FET, including a semiconductor substrate of a given first conductivity type having first and second surfaces, at least one channel zone of a second conductivity type opposite the first conductivity type embedded on the first surface of the substrate, a source zone of the first conductivity type embedded in the channel zone, a drain zone adjoining the first surface of the substrate, a drain electrode connected to the second surface of the substrate, and insulating layer disposed on the first surface of the substrate, at least one gate electrode disposed on the insulating layer, at least one injector zone of the second conductivity type embedded in the first surface of the substrate, and a contact being connected to the at least one injector zone and connectible to a voltage supply.

Abstract: The invention relates to a power transistor with a semiconductor body. When shutting off a power transistor, local fusing of the semiconductor body may occur, if a characteristic power loss is exceeded for a certain period of time (second breakdown). This can be avoided, if the transistor includes a multiplicity of small partial transistors with very narrow emitter zones which are mutually paralleled via a ballast resistance each.

Abstract: An arrangement for the protection of a transistor, particularly a MOS-switching transistor including a zener diode connected between the gate and source terminals for limiting the gate potential and a switch-off transistor connected to the control circuit of the MOS-transistor for grounding the gate thereof and switching it off. First and second monitoring circuits are coupled between the MOS-transistor and the switch-off transistor for producing a signal switching on the switch-off transistor in response to a drop in the load current and an increase in the output voltage of the MOS-transistor. First and second timing circuits block the signals of the monitoring circuits for predetermined intervals.

Abstract: An IGFET assembly, includes a semiconductor substrate of a given first conductivity type having first and second surfaces, and an IGFET having at least one channel zone of a second conductivity type opposite the given first conductivity type embedded in the first surface of the substrate, a source zone of the first conductivity type embedded in the channel zone, a drain zone adjacent the first surface of the substrate, a drain electrode connected to the second surface of the substrate, a gate electrode disposed above and insulated from the first surface of the substrate, an injector zone of the second conductivity type being embedded in the first surface of the substrate under the gate electrode and being connectible to a voltage source, the injector zone having a surface and having a doping, at least at the surface of the injector zone, causing an inversion layer to be formed at the surface of the injector zone when the IGFET is switched on, and a contact zone of the second conductivity type embedded in the

Abstract: A circuit arrangement for drive of a thyristor with light comprises a zero pause control which permits an ignition of a thyristor only in a proximity of a zero point of the thyristor voltage. The control contains an IGFET which transports away a base current of the phototransistor effecting ignition when the thyristor voltage exceeds a specific value. The gate terminal of the IGFET connects to an alternating voltage via a photodiode. The zero point control can only be activated when the photodiode is illuminated.

Abstract: Field effect transistor, including negatively and positively doped zones in the form of a substrate of a given first conductivity type having a surface, a first zone of a second conductivity type being opposite the first given conductivity type and embedded planar in the substrate, a second zone of the first conductivity type being embedded planar in the first zone, a first p-n junction disposed between the first and second zones, a second p-n junction disposed between the first zone and the substrate, both of the p-n junctions emerging to the surface of the substrate, at least one channel zone disposed between the p-n junctions, and a gate electrode at least covering the channel zone and being insulated from the surface of the substrate, at least the second p-n junction at least in the vicinity of the channel zone adjoining a given negatively doped zone at the surface of the substrate at an angle of at most 180.degree. to the given negatively doped zone.

Abstract: An IGFET assembly, includes a semiconductor substrate of a given first conductivity type having first and second surfaces, an IGFET having at least one channel zone of a second conductivity type opposite the first given conductivity type embedded in the first surface of the substrate, a source zone of the first conductivity type embedded planar in the channel zone, a drain zone adjacent the first surface of the substrate, a drain electrode connected to the second surface of the substrate, an insulating layer disposed on the first surface of the substrate, at least one gate electrode disposed on the insulating layer, at least one injector zone of the second conductivity type embedded in the first surface of the substrate, a contact for connecting the injector zone to a voltage source, an emitter zone of the first conductivity type embedded in the injector zone, the emitter zone having a heavier doping than the injector zone, the injector zone including a part thereof emerging to the first surface of the substr

Abstract: Photo transistor, including a semiconductor body having a surface, a region placed on the surface of the body being intended for light exposure having an edge and a remainder of the region, a collector zone placed in the body and having at least a part thereof emerging to the surface of the body, a base zone being embedded in a planar manner in the collector zone and having at least a part thereof emerging to the surface of the body, an emitter zone being embedded in a planar manner in the base zone, an emitter electrode disposed on the emitter zone, an insulating layer covering the region intended for exposure, an auxiliary zone being embedded in the surface of the body and having a conductivity type being opposite to that of the collector zone, an auxiliary electrode being placed on the insulating layer and overlapping at least the part of the base zone emerging to the surface and the auxiliary zone and covering the part of the collector zone emerging to the surface, the insulating layer having a relatively

Abstract: Controlled semiconductor switch with a semiconductor body containing a thyristor structure having a first zone of first conductivity type embedded in coplanar relationship in a second zone of second conductivity type; also containing a third zone of the first conductivity type and a fourth zone of the second conductivity type; and further containing an MIS-FET integrated into the semiconductor body and having a source zone of the first conductivity type embedded in coplanar relationship in a zone of the second conductivity type; an insulating layer disposed on the surface of the semiconductor body, a control electrode lying on the insulating layer and covering a first channel zone operatively associated with the FET; and a cathode electrode on the semiconductor body, including the features that the zone of the second conductivity type of the MIS-FET is embedded in the third zone in coplanar relationship therewith and forms the first channel zone at the surface of the semiconductor body; the second zone of the

Abstract: Light-controlled thyristor, including a semiconductor body having a surface, a first zone being of a given conduction type and having a given depth and being adjacent to the surface of the body, a second zone of the given conduction type having a region intended for exposure, a third zone of a conduction type opposite to the given type being disposed under the first and second zones and having a part thereof emerging to the surface of the body between the first and second zones and having a depression formed therein containing the region intended for exposure, electrodes contacting the first and second zones, said second zone having a first and a second subzone, the first subzone having the given depth and being disposed between the part of the third zone emerging to the surface of the body and the depression, the first subzone being in contact with one of the electrodes, the second subzone being the region intended for exposure in the depression and being formed by implanted ions, the second subzone being di

Abstract: Switch with at least two series-connected MOS-FETs has a drain terminal of a preceding MOS-FET connected to a source terminal of a succeeding MOS-FET the MOS-FETs having respective control terminals connectible to a control voltage. The control terminal of the preceding MOS-FET is directly connected to a terminal of the control voltage source. The control terminal of the succeeding MOS-FET is connected to the control terminal of the respective preceding MOS-FET via a diode poled in forward direction with respect to the control voltage source. A resistor is connected between the control terminal and the source terminal of the succeeding MOS-FET.

Abstract: Light-controlled transistor, including a semiconductor body having a surface including a given area intended for the incidence of light, a collector zone, and a base zone and an emitter zone each having a smaller area than the semiconductor body, each of the base and collector zones having at least a part thereof emerging to the surface, a pn-junction disposed between the base and emitter zones and a pn-junction disposed between the base and collector zones, each of the pn-junctions emerging to the surface at the given area, and at least one auxiliary electrode disposed on and electrically insulated from the surface, the auxiliary electrode covering at least the parts of the base and collector zones emerging to the surface, the auxiliary electrode being connectible to an auxiliary voltage having the same polarity as the emitter bias.

Abstract: Field effect transistor having a semiconductor substrate of a first conduction type, a source and a drain of a conduction type opposite the first conduction type, a zone of the opposite conduction type disposed between the source and the drain and surrounded by a region of the first conduction type and doped more heavily than the substrate and a control electrode insulated from the surface of the semiconductor substrate and covering the zone disposed between the source and the drain over the entire width thereof includes a drift section for charge carriers forming part of the zone disposed between the source and the drain and located between the control section and the drain, the drift section containing dopant atoms increasing in number in direction from the control electrode toward the drain.

Abstract: The invention relates to an optoelectronic sensor with at least one sensor element according to the principle of carrier injection (CID), whereby the surface of a doped semiconductor body is faced by two closely adjoining electrodes insulated from one another and from the semiconductor surface by a thin insulation layer that are controllable via separate control circuits. The semiconductor body contains a more strongly doped area having the type of the semiconductor doping on its surface below one of the electrodes, which area extends slightly into the semiconductor surface lying below the other electrode. Thereby, a narrow potential barrier is formed between the two electrodes, for example, between a line electrode and a column electrode. When an optically generated charge under one electrode is displaced under the other electrode, then this narrow potential barrier prevents a flow back of the charge under the discharged electrode.