Abstract: According to an embodiment, a contact measurement circuit is configured to be coupled between a first contact and a second contact, and the contact measurement circuit includes a first transistor, a control capacitor, and a voltage measurement unit. The first transistor includes a first conduction terminal configured to be coupled to the first contact, a second conduction terminal, and a first control terminal. The control capacitor includes a first capacitor terminal coupled to the second conduction terminal and a second capacitor terminal coupled to the first control terminal. The voltage measurement unit is coupled to the first capacitor terminal and the second capacitor terminal, and the second capacitor terminal is configured to be coupled to the second contact.

Abstract: A circuit arrangement with a transmission arrangement is disclosed including a transformer.

Abstract: Various techniques relating to drive train control are disclosed. In an embodiment, in a first mode of operation communication between a controller and a submodule of the drive train takes place via a first communication channel and optionally additionally via a second communication channel. In a second mode of operation, upon failure of the first communication channel, communication with the submodule of the drive train takes place via the second communication channel.

Abstract: An electronic circuit comprises an input insulated gate field effect transistor. The input insulated gate field effect transistor comprises first and second load terminals and a control terminal. The control terminal is electrically coupled to an input signal terminal of the electronic circuit. The electronic circuit further comprises a control circuit. An input terminal of the control circuit is electrically coupled to the second load terminal. The control terminal is electrically connected to a control structure comprising a control electrode and charge storage structure.

Abstract: The rectifier includes two input paths configured to receive an alternating input voltage and two output paths configured to provide a direct output voltage. A switched-mode rectifying path is connected between one of the input paths and one of the output paths and comprises at least two semiconductor elements with controllable paths; the controllable paths are series-connected with each other. An auxiliary output node is disposed between the controllable paths of the two semiconductor elements in the rectifying path and provides an auxiliary node voltage. A controllable output path is connected downstream of one of the two output paths and comprises a semiconductor element with a controllable path, wherein the controllable path of the semiconductor element of the controllable output path is controlled by a signal representing the auxiliary node voltage.

Abstract: In one embodiment, a system for communication has a receiver for receiving data from a passive transmitter capacitively coupled to the receiver. The receiver has a sensing element having a plurality of terminals configured to be capacitively coupled to the passive transmitter and DC isolated from the passive transmitter.

Abstract: A method is disclosed. An analog signal is sampled to form a sample value using a sample and hold circuit. The sample value is converted to form a first digital result. The sample value is converted to form a second digital result.

Abstract: A rectifier includes two input paths configured to receive an alternating input voltage, two output paths configured to provide a direct output voltage, and an auxiliary output path configured to provide an auxiliary output voltage. At least two rectifying paths are connected between each of the input and output paths. At least two rectifying paths are switched-mode rectifying paths that are connected to the same output path. The two switched-mode rectifying paths are configured to connect one output path to one input path during one half wave of the input voltage, and to connect the one output path to the other input path during the other half wave. The two switched-mode rectifying paths each comprise two semiconductor elements with controllable paths that are series-connected with each other by an auxiliary output node. At least one rectifier element is connected between the auxiliary output and the two auxiliary output nodes.

Abstract: According to various examples, circuits, detection circuits, methods for operating circuits and methods for operating power supplies are described herein. As one example, a circuit includes a transistor and a detection circuit. A voltage is coupled across two controlled terminals of the transistor and the transistor is configured to be in a non-conducting state. The detection circuit is coupled to a control terminal of the transistor. The detection circuit is configured to detect at least one of: a signal due to a voltage coupled across the two controlled terminals; a signal due to a change in the voltage coupled across the two controlled terminals; and a change in a signal at the control terminal due to a change in the voltage coupled across the two controlled terminals.

Abstract: In an embodiment, a device comprises a circuit with at least one circuit element; measurement circuitry capable to test a state of the at least one circuit element during an operation of the circuit, the measurement circuitry comprising a first terminal configured to be coupled to a first node of the circuit via a first capacitor, a second terminal configured to be coupled to a second node of the circuit, wherein the measurement circuitry is configured to determine in situ an operating state of the at least one circuit element based on signals applied by the measurement circuitry to the circuit during the operation of the circuit.

Abstract: An integrated circuit comprises a load transistor including first and second load terminals and a load control terminal. The integrated circuit further comprises a clamping structure. The clamping structure comprises a clamping transistor, the clamping transistor including first and second clamping transistor load terminals and a gate terminal. The clamping transistor is electrically coupled between the load control terminal and the first load terminal and a clamping voltage of the load transistor is determined by a threshold voltage Vth of the clamping transistor.

Abstract: A system includes a bus system, such as a LIN bus system. A number of components are connected to the bus system. A first component of the components is configured to detect a direction of a current to detect a location of the first component in the bus system. Each of the components can have a unique address.

Abstract: A method and a system for compensating a delay mismatch between a first measurement channel and a second measurement channel is disclosed. A method for compensating a delay mismatch between a first measurement channel and a second measurement channel includes providing a reference point for starting the first and second measurement channel, and starting the first measurement channel after expiration of a first delay period which begins at the reference point. The method further includes starting the second measurement channel after expiry of a second delay period which begins at the reference point, wherein a difference between a length of the first delay period and a length of the second delay period is substantially equal to the delay mismatch between the first measurement channel and the second measurement channel.

Abstract: A system includes a bus system, such as a LIN bus system. A number of components are connected to the bus system. A first component of the components is configured to detect a direction of a current to detect a location of the first component in the bus system. Each of the components can have a unique address.

Abstract: In accordance with an embodiment, a method includes driving an electronic switch in a switched-mode power converter in successive drive cycles, wherein driving the switch in each of the drive cycles comprises switching on the electronic for an on-period and subsequently switching off the electronic switch for an off-period. The method further includes establishing the on-period based on a comparison of an on-time signal with an off-threshold, calculating the off-threshold based on an output signal of the switched-mode power converter and a compensation offset, and calculating the compensation offset in one drive cycle based on an estimated delay time, wherein the estimated delay time is calculated based on a measured delay time and an estimated delay time of a previous drive cycle.

Abstract: In accordance with an embodiment, a method of controlling a switched-mode power supply includes operating the switched-mode power supply in a first operating mode by monitoring a feedback signal from an output of the power supply using a feedback interface circuit in a first configuration. The method further includes determining when the feedback signal crosses a first threshold in a first direction, and transitioning the switched-mode power from the first operating to a second operating mode by switching the feedback interface circuit from the first configuration to a second configuration.

Abstract: Techniques are described to adjust the time when a switch is turned on from the time of one voltage valley to the time of another voltage valley for controlling an average load current or average load voltage. In some examples, the adjustment is instantaneous, and in some examples, the adjustment is gradual. Both of these example techniques provide for high switching efficiency of the switch.

Abstract: A method is disclosed. An analog signal is sampled to form a sample value using a sample and hold circuit. The sample value is converted to form a first digital result. The sample value is converted to form a second digital result.

Abstract: A method is suggested comprising the steps: sampling an input signal at a sampling rate, wherein the input signal is based on an AC signal; comparing the input signal with a threshold signal, determining a first value in case the input signal is larger than the threshold signal; determining at least one second value in case the input signal is smaller than the threshold signal; increasing the sampling rate in case a predefined number of consecutive first values is determined; and decreasing the sampling rate in case the at least one second value is determined. Also, respective devices and an according computer program product are provided.

Abstract: Disclosed herein are techniques related to control of a system. According to some embodiments the system includes a plurality of elements and a power supply to supply power to the elements. According to some embodiments the method comprises: delivering a clock signal to a subset of elements, the clock signal defining a sequence of clock pulses; determining, for a first clock pulse, elements in the subset to consume power; and controlling the power supply. A system is disclosed having a plurality of elements including a subset of elements, a power supply to supply power to the elements, a clock signal delivery configured to deliver a clock signal to the subset of elements in the plurality of elements, and a control module configured to control the power supply based on the determining elements to consume power. An apparatus and a device for use in a system are also disclosed.