Abstract: A method for the supervision of clock signals in a digital data system in which data is clocked progressively by clock signals through a number of registers includes supervisory flip flops associated with each register with a clock supervision bit progressively clocked through the flip flops which together from a supervision chain. The absence of one or more of the clock signals prevents the clock supervision bit from propagating to the end of the chain. By monitoring said clock supervision bit after propagation through the supervision chain it can be determined whether clock signals are supplied correctly to all registers.