Abstract: A protocol processing system includes a frame buffer controller to store data. A protocol terminator system is coupled to the frame buffer controller to receive and transmit events. An event queue system is coupled to the protocol terminator system to store the events in an event queue. A protocol processing agent is provided to process a protocol. The protocol processing agent has a first connection with the frame buffer controller and a second connection with the protocol terminator system. The first connection transports the data between the protocol processing agent and the frame buffer controller, and the second connection transports the events between the protocol processing agent and the protocol terminator system.

Abstract: A network processor application-specific integrated circuit (ASIC) includes a plurality of processor devices each adapted to generate a semaphore operation request. A request arbiter, having connections to the plurality of processor devices, is provided to determine the semaphore operation request from one of the plurality of processor devices to be forwarded. A content addressable memory (CAM) is provided to store a data set. A CAM control state machine interconnects the request arbiter and the CAM, and implements a semaphore operation requested by one of the plurality of processor devices to the content addressable memory to access the data set.

Abstract: A protocol processing system includes a frame buffer controller to store data. A protocol terminator system is coupled to the frame buffer controller to receive and transmit events. An event queue system is coupled to the protocol terminator system to store the events in an event queue. A protocol processing agent is provided to process a protocol. The protocol processing agent has a first connection with the frame buffer controller and a second connection with the protocol terminator system. The first connection transports the data between the protocol processing agent and the frame buffer controller, and the second connection transports the events between the protocol processing agent and the protocol terminator system.

Abstract: A network processor application-specific integrated circuit (ASIC) includes a plurality of processor devices each adapted to generate a semaphore operation request. A request arbiter, having connections to the plurality of processor devices, is provided to determine the semaphore operation request from one of the plurality of processor devices to be forwarded. A content addressable memory (CAM) is provided to store a data set. A CAM control state machine interconnects the request arbiter and the CAM, and implements a semaphore operation requested by one of the plurality of processor devices to the content addressable memory to access the data set.