Patents by Inventor Jens KOWALSKY

Jens KOWALSKY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11791423
    Abstract: A semiconductor having a n-doped cathode layer, a p-doped anode layer, and a drift region, arranged between the cathode layer and the anode layer, with a dopant concentration of at most 8·1015 cm?3. The drift region has a lightly n-doped drift layer and a lightly p-doped drift layer, arranged between the n-doped drift layer and the anode layer, both drift layers each have a layer thickness of at least 5 ?m. The cathode layer has a first section with a dopant concentration of at least 1·1017 cm?3 and a second section, arranged between the first section and the drift region, the second section has a layer thickness of at least 1 ?m and a dopant concentration gradient that increases in the direction of the first section up to a dopant concentration maximum. The dopant concentration maximum is smaller or equal to the dopant concentration of the first section.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: October 17, 2023
    Assignee: 3-5 Power Electronics GmbH
    Inventors: Jens Kowalsky, Riteshkumar Bhojani, Volker Dudek
  • Patent number: 11784261
    Abstract: A stacked III-V semiconductor diode comprising or consisting of GaAs, with a heavily n-doped cathode layer, a heavily p-doped anode layer, and a drift region arranged between the cathode layer and the anode layer with a dopant concentration of at most 8·1015 cm?3, and a layer thickness of at least 10 ?m, wherein the cathode layer has a delta layer section with a layer thickness of 0.1 ?m to 2 ?m and a dopant concentration of at least 1·1019 cm?3.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: October 10, 2023
    Assignees: AZUR SPACE Solar Power GmbH, 3-5 Power Electronics GmbH
    Inventors: Volker Dudek, Jens Kowalsky, Riteshkumar Bhojani, Daniel Fuhrmann, Thorsten Wierzkowski
  • Patent number: 11769839
    Abstract: A stacked III-V semiconductor diode comprising or consisting of GaAs with a highly n-doped cathode layer, a highly p-doped anode layer and a drift region arranged between the cathode layer and the anode layer, wherein the drift region has a low n-doped drift layer and a low p-doped drift layer, the n-doped drift layer is arranged between the p-doped drift layer and the cathode layer, both drift layers each have a layer thickness of at least 5 ?m and, along the respective layer thickness, have a dopant concentration maximum of not more than 8·1015 cm?3, the dopant concentration maxima of the two drift layers have a ratio of 0.1 to 10 to each other and a ratio of the layer thickness of the n-doped drift layer to the layer thickness of the p-doped drift layer is between 0.5 and 3.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: September 26, 2023
    Assignee: 3-5 Power Electronics GmbH
    Inventors: Jens Kowalsky, Volker Dudek, Riteshkumar Bhojani
  • Publication number: 20220336315
    Abstract: Packaged semiconductor device having a heat sink, wherein the heat sink has a top, a bottom, lateral surfaces that connect the top to the bottom, and, extending within the heat sink, a cooling structure with an inlet line as well as an outlet line for a cooling medium, and is composed of an electrically conductive material with a first coefficient of thermal expansion at the top and with a second coefficient of thermal expansion at the bottom, a die is arranged on each of the top and the bottom of the heat sink and is connected to the heat sink in an electrically conductive manner, the coefficients of thermal expansion of the top and of the bottom of the heat sink correspond in each case to the coefficient of thermal expansion of the die arranged thereon or differ from the coefficient of thermal expansion of the die arranged thereon by at most 10% or by at most 20%.
    Type: Application
    Filed: April 14, 2022
    Publication date: October 20, 2022
    Applicant: 3-5 Power Electronics GmbH
    Inventor: Jens KOWALSKY
  • Publication number: 20220254937
    Abstract: A stacked III-V semiconductor diode comprising or consisting of GaAs with a highly n-doped cathode layer, a highly p-doped anode layer and a drift region arranged between the cathode layer and the anode layer, wherein the drift region has a low n-doped drift layer and a low p-doped drift layer, the n-doped drift layer is arranged between the p-doped drift layer and the cathode layer, both drift layers each have a layer thickness of at least 5 ?m and, along the respective layer thickness, have a dopant concentration maximum of not more than 8·1015 cm?3, the dopant concentration maxima of the two drift layers have a ratio of 0.1 to 10 to each other and a ratio of the layer thickness of the n-doped drift layer to the layer thickness of the p-doped drift layer is between 0.5 and 3.
    Type: Application
    Filed: February 8, 2022
    Publication date: August 11, 2022
    Applicant: 3-5 Power Electronics GmbH
    Inventors: Jens KOWALSKY, Volker DUDEK, Riteshkumar BHOJANI
  • Publication number: 20220254936
    Abstract: A stacked III-V semiconductor diode comprising or consisting of GaAs, with a heavily n-doped cathode layer, a heavily p-doped anode layer, and a drift region arranged between the cathode layer and the anode layer with a dopant concentration of at most 8·1015 cm?3, and a layer thickness of at least 10 ?m, wherein the cathode layer has a delta layer section with a layer thickness of 0.1 ?m to 2 ?m and a dopant concentration of at least 1·1019 cm?3.
    Type: Application
    Filed: February 8, 2022
    Publication date: August 11, 2022
    Applicants: 3-5 Power Electronics GmbH, AZUR SPACE Solar Power GmbH
    Inventors: Volker DUDEK, Jens KOWALSKY, Riteshkumar BHOJANI, Daniel FUHRMANN, Thorsten WIERZKOWSKI
  • Publication number: 20220254938
    Abstract: A semiconductor having a n-doped cathode layer, a p-doped anode layer, and a drift region, arranged between the cathode layer and the anode layer, with a dopant concentration of at most 8·1015 cm?3. The drift region has a lightly n-doped drift layer and a lightly p-doped drift layer, arranged between the n-doped drift layer and the anode layer, both drift layers each have a layer thickness of at least 5 ?m. The cathode layer has a first section with a dopant concentration of at least 1·1017 cm?3 and a second section, arranged between the first section and the drift region, the second section has a layer thickness of at least 1 ?m and a dopant concentration gradient that increases in the direction of the first section up to a dopant concentration maximum. The dopant concentration maximum is smaller or equal to the dopant concentration of the first section.
    Type: Application
    Filed: February 8, 2022
    Publication date: August 11, 2022
    Applicant: 3-5 Power Electronics GmbH
    Inventors: Jens KOWALSKY, Riteshkumar BHOJANI, Volker DUDEK