Abstract: An apparatus for processing semiconductor wafers includes: a wafer support with a first positioning system that can rotate the wafer support coaxially with a wafer; at least one processing apparatus, which can be moved with a second positioning system such that a processing tool proceeding from the processing apparatus can be guided radially over the wafer; and at least one position determining apparatus for determining a wafer position on the basis of features of the wafer. Alignment marks of the wafer are found and points to be processed, such as laser fuses, are moved by rotation of the wafer and movement of at least one processing apparatus in the radial direction above the wafer.

Abstract: An apparatus for processing semiconductor wafers includes: a wafer support with a first positioning system that can rotate the wafer support coaxially with a wafer; at least one processing apparatus, which can be moved with a second positioning system such that a processing tool proceeding from the processing apparatus can be guided radially over the wafer; and at least one position determining apparatus for determining a wafer position on the basis of features of the wafer. Alignment marks of the wafer are found and points to be processed, such as laser fuses, are moved by rotation of the wafer and movement of at least one processing apparatus in the radial direction above the wafer.

Abstract: In a method for testing a plurality of devices, which are arranged on a wafer and connected to a common data line, wherein the devices are connectable to a test unit via the common data line, a connection is separated first between a defective device and the common data line, or an internal connection in the defective device is separated. Subsequently, the remaining devices are tested. Alternatively, instead of the connection between the defective device and the common data line, the connection between a defective device and a common or an individual supply line is separated.

Abstract: On a substrate, first and second electrical connecting elements of an integrated circuit are disposed next to one another along a first direction. The first electrical connecting element is at a first distance from the second electrical connecting element. First and interconnects are disposed on the substrate, the first interconnect being connected to the first electrical connecting element and the second interconnect being connected to the second electrical connecting element. Third and fourth electrical connecting elements are disposed on the substrate and the first and second interconnects are disposed between the third and fourth electrical connecting elements and therebetween are at a second distance from one another, the second distance being smaller than the first distance.

Abstract: A method for releasable contact-connection of a plurality of integrated semiconductor modules on a wafer, each of which having a plurality of interconnected supply voltage terminals, includes the steps of providing a contacting card for applying external electrical signals to the semiconductor modules with contact elements for releasable electrical connection to terminal pads of the semiconductor modules, aligning the contacting card with the wafer, producing a releasable contact between terminal pads of the plurality of semiconductor modules and the contact elements of the contacting card, checking the contact quality for each of the semiconductor modules by applying a voltage to at least one of the supply voltage terminals of the semiconductor module through the contacting card, measuring the voltage present at a further one of the supply voltage terminals through the contacting card, and using the measurement result to assess whether or not the semiconductor module has correct contact.

Abstract: On a substrate, first and second electrical connecting elements of an integrated circuit are disposed next to one another along a first direction. The first electrical connecting element is at a first distance from the second electrical connecting element. First and interconnects are disposed on the substrate, the first interconnect being connected to the first electrical connecting element and the second interconnect being connected to the second electrical connecting element. Third and fourth electrical connecting elements are disposed on the substrate and the first and second interconnects are disposed between the third and fourth electrical connecting elements and therebetween are at a second distance from one another, the second distance being smaller than the first distance.

Abstract: In a method for testing a plurality of devices, which are arranged on a wafer and connected to a common data line, wherein the devices are connectable to a test unit via the common data line, a connection is separated first between a defective device and the common data line, or an internal connection in the defective device is separated. Subsequently, the remaining devices are tested. Alternatively, instead of the connection between the defective device and the common data line, the connection between a defective device and a common or an individual supply line is separated.

Abstract: A method for releasable contact-connection of a plurality of integrated semiconductor modules on a wafer, each of which having a plurality of interconnected supply voltage terminals, includes the steps of providing a contacting card for applying external electrical signals to the semiconductor modules with contact elements for releasable electrical connection to terminal pads of the semiconductor modules, aligning the contacting card with the wafer, producing a releasable contact between terminal pads of the plurality of semiconductor modules and the contact elements of the contacting card, checking the contact quality for each of the semiconductor modules by applying a voltage to at least one of the supply voltage terminals of the semiconductor module through the contacting card, measuring the voltage present at a further one of the supply voltage terminals through the contacting card, and using the measurement result to assess whether or not the semiconductor module has correct contact.

Abstract: An integrated circuit includes electrical conductor tracks adjacently disposed parallel to one another and running substantially in a first direction. The tracks have at least three electrical connection points that can be severed by energy. The connection points are offset with respect to one another both in the first direction and in a second direction at right angles thereto. A central connection point is disposed between two outer connection points viewed in both directions. The connection points are a constituent part of a central or of an outer conductor track. The central and outer tracks are disposed parallel to one another and run substantially in the first direction. Each outer conductor track has, at the level of the central connection point, an offset facing away from the latter and, at the level of the outer connection point of the respective other outer conductor track, an offset facing the latter.

Abstract: An integrated circuit includes electrical conductor tracks adjacently disposed parallel to one another and running substantially in a first direction. The tracks have at least three electrical connection points that can be severed by energy. The connection points are offset with respect to one another both in the first direction and in a second direction at right angles thereto. A central connection point is disposed between two outer connection points viewed in both directions. The connection points are a constituent part of a central or of an outer conductor track. The central and outer tracks are disposed parallel to one another and run substantially in the first direction. Each outer conductor track has, at the level of the central connection point, an offset facing away from the latter and, at the level of the outer connection point of the respective other outer conductor track, an offset facing the latter.