Patents by Inventor Jens Ullmann

Jens Ullmann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9772351
    Abstract: Pulsed current circuitry for electromigration testing of semiconductor integrated circuits and components. The circuit includes a multiplexer that outputs analog voltage pulses, and is capable of generating both bipolar and unipolar voltage pulses. At least one operational amplifier and resistor receive the voltage pulses from the multiplexer and convert the voltage pulses to current pulses. A charge booster circuit is provided for minimizing overshoots and undershoots during transitions between current levels in the test circuit.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: September 26, 2017
    Assignee: QualiTau, Inc.
    Inventors: Jens Ullmann, Gedaliahoo Krieger, James Borthwick
  • Publication number: 20170131327
    Abstract: Pulsed current circuitry for electromigration testing of semiconductor integrated circuits and components. The circuit includes a multiplexer that outputs analog voltage pulses, and is capable of generating both bipolar and unipolar voltage pulses. At least one operational amplifier and resistor receive the voltage pulses from the multiplexer and convert the voltage pulses to current pulses. A charge booster circuit is provided for minimizing overshoots and undershoots during transitions between current levels in the test circuit.
    Type: Application
    Filed: November 7, 2016
    Publication date: May 11, 2017
    Inventors: Jens ULLMANN, Gedaliahoo KRIEGER, James BORTHWICK
  • Publication number: 20170131326
    Abstract: Pulsed current circuitry for electromigration testing of semiconductor integrated circuits and components. The circuit includes a multiplexer that outputs analog voltage pulses, and is capable of generating both bipolar and unipolar voltage pulses. At least one operational amplifier and resistor receive the voltage pulses from the multiplexer and convert the voltage pulses to current pulses. A charge booster circuit is provided for minimizing overshoots and undershoots during transitions between current levels in the test circuit.
    Type: Application
    Filed: November 10, 2015
    Publication date: May 11, 2017
    Inventor: Jens ULLMANN
  • Patent number: 7602205
    Abstract: An electronic device under test (DUT) may be incorporated into a circuit having a voltage limiter connected in parallel with the DUT. The circuit includes a controlled current source having an output current connected in series with the DUT. The voltage limiter is characterized in that, when the output current is such that the voltage across the DUT (Vdut) would exceed a particular maximum voltage Vmax, without the voltage limiter in place, at least a portion of the output current flows through the voltage limiter, so as to limit Vdut to be less than or equal to Vmax. When the output current is such that Vdut would be less than or equal to Vmax, current does not flow through the voltage limiter. The circuit may include a plurality of DUTs, each DUT connected in series with the output current of a controlled current source, with a voltage limiter connected in parallel with each DUT.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: October 13, 2009
    Assignee: Qualitau, Inc.
    Inventor: Jens Ullmann
  • Patent number: 7602201
    Abstract: A test socket assembly is for use in testing integrated circuits. A single piece socket is formed substantially of an insulating material and having a plurality of holes formed therein configured to receive a plurality of electrically conductive springs. Each hole of the single piece socket has therein a separate one of the electrically conductive springs. A test socket includes a plurality of pins configured to receive leads of an integrated circuit, the pins of the test socket extending into the plurality of holes of the single piece socket with each pin engaging a spring, wherein the single piece socket is positioned on a circuit board with the plurality of holes being in alignment with electrical contacts on the circuit board such that the plurality of springs are electrically interconnecting the contacts and the plurality of pins. The single -piece socket is comprised substantially of a high-temperature insulating material, such as ceramic.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: October 13, 2009
    Assignee: Qualitau, Inc.
    Inventors: Jose Ysaguirre, Jens Ullmann, Adalberto M. Ramirez, Robert J. Sylvia
  • Patent number: 7598760
    Abstract: A strip-shaped package is provided that can accept a single die up to many dice. Conduction paths are printed (or otherwise integrally formed) thereon to the edge of the package, and a complementary socket may be provided that, in combination with the strip-shaped package, provides for electrical connection to test electronics without the use of package leads. The strip-shaped package may be made of ceramic or other temperature resistant material. The strip-shaped package may have at least one “well” location in which the die or dice may be affixed to the strip-shaped package. The strip may have notches configured to function as separators between the individual die housings (and related integrally-formed conduction paths).
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: October 6, 2009
    Assignee: Qualitau, Inc.
    Inventors: Thomas G. Bensing, Adalberto M. Ramirez, Jens Ullmann, Jacob Herschmann, Robert J. Sylvia, Maurice C. Evans
  • Publication number: 20090206869
    Abstract: An electronic device under test (DUT) may be incorporated into a circuit having a voltage limiter connected in parallel with the DUT. The circuit includes a controlled current source having an output current connected in series with the DUT. The voltage limiter is characterized in that, when the output current is such that the voltage across the DUT (Vdut) would exceed a particular maximum voltage Vmax, without the voltage limiter in place, at least a portion of the output current flows through the voltage limiter, so as to limit Vdut to be less than or equal to Vmax. When the output current is such that Vdut would be less than or equal to Vmax, current does not flow through the voltage limiter. The circuit may include a plurality of DUTs, each DUT connected in series with the output current of a controlled current source, with a voltage limiter connected in parallel with each DUT.
    Type: Application
    Filed: February 19, 2008
    Publication date: August 20, 2009
    Applicant: QUALITAU, INC.
    Inventor: Jens Ullmann
  • Publication number: 20080315900
    Abstract: A test socket assembly is for use in testing integrated circuits. A single piece socket is formed substantially of an insulating material and having a plurality of holes formed therein configured to receive a plurality of electrically conductive springs. Each hole of the single piece socket has therein a separate one of the electrically conductive springs. A test socket includes a plurality of pins configured to receive leads of an integrated circuit, the pins of the test socket extending into the plurality of holes of the single piece socket with each pin engaging a spring, wherein the single piece socket is positioned on a circuit board with the plurality of holes being in alignment with electrical contacts on the circuit board such that the plurality of springs are electrically interconnecting the contacts and the plurality of pins. The single -piece socket is comprised substantially of a high-temperature insulating material, such as ceramic.
    Type: Application
    Filed: June 22, 2007
    Publication date: December 25, 2008
    Applicant: QUALITAU, INC.
    Inventors: Jose Ysaguirre, Jens Ullmann, Adalberto M. Ramirez, Robert J. Sylvia
  • Patent number: 7429856
    Abstract: A particular configuration of voltage source measurement (VSM) circuitry minimizes common mode errors in measurement of current through a device under test (DUT), even across a wide range of output voltages. The current IDUT is not affected by common-mode errors, since the current measurement is based on the output voltage of an operational amplifier or a differential amplifier, and the circuit configuration is such that the current measurement is made while the operation amplifier or differential amplifier has very low common-mode input voltage.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: September 30, 2008
    Assignee: Qualitau, Inc.
    Inventor: Jens Ullmann
  • Patent number: 7172450
    Abstract: A socket for use in testing packaged integrated circuits having leads depending therefrom includes a first member for receiving the integrated circuit package and having a plurality of holes for receiving leads extending from the package. A second member has a plurality of wire contacts for engaging the leads, the first and second members being arranged to permit relative lateral translation thereof. A support frame includes a first portion which physically engages the first member and a second portion which physically engages the second member. A lever or handle is attached to the second portion and includes a cam surface for engaging a cam follower on the first portion for imparting relative lateral motion between the two members whereby the package leads physically engage wires of the second member.
    Type: Grant
    Filed: January 11, 2006
    Date of Patent: February 6, 2007
    Assignee: Qualitau, Inc.
    Inventors: Robert James Sylvia, Adalberto M. Ramirez, Jens Ullmann, Jose Ysaguirre, Peter P. Cuevas, Maurice C. Evans
  • Patent number: 7093937
    Abstract: An optical component and a coating system for coating substrates for optical components with essentially rotationally symmetric coatings, the system having a planetary-drive system (1) that has a rotating planet carrier (2) and several planets (4), each of which carries a single substrate, that corotate both with the planet carrier and with respect to the primary carrier. In one embodiment a set of stationary first masks (20) that allow controlling the radial variation in physical film thickness is arranged between a source (8) of material situated beneath the planets and the substrates. A set of second masks that mask off evaporation angles exceeding a limiting evaporation or incidence angle (? max) for every substrate also corotate with the primary carrier (2), which allows depositing coatings having a prescribed radial film-thickness distribution and a virtually constant density of the coating material over their full radial extents for relatively low, and only slightly varying, evaporation angles.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: August 22, 2006
    Assignee: Carl Zeiss SMT AG
    Inventors: Harry Bauer, Matthias Heller, Hans-Jochen Paul, Jens Ullmann, Patrick Scheible, Christoph Zaczek
  • Patent number: 7049713
    Abstract: A pulsed current generator circuit for providing current pulses to a device under test includes a current source for applying a current to the device under test and a controlled current shunt for shunting current from the device under test. A booster circuit is provided for supplying a booster current to the device under test when the controlled current shunt is opened and current again flows through the device under test, thereby facilitating recharge of a parasitic capacitance associated with the device under test.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: May 23, 2006
    Assignee: Qualitau, Inc.
    Inventors: Peter Cuevas, Gedaliahoo Krieger, Maurice Evans, Jens Ullmann
  • Publication number: 20060033984
    Abstract: An assembly includes a holder (5), an optical component (1) transmitting radiation in a first region of ultraviolet (UV) radiation adhered to the holder by an adhesive (4), the adhesive being hardenable by radiation of a second region of ultraviolet radiation, a first layer (3) disposed between the optical component and the adhesive, and a second layer (2) for enhancing adhesion between the optical component and the first layer. The first layer is capable of transmitting radiation of the second region of UV radiation and obstructing to a high degree transmission of UV radiation of the first region by at least one of absorption and reflection. The optical component has a transmitting zone and the first layer is located outside of the transmitting zone. The second layer for enhancing adhesion between the optical component and the first layer is disposed between the first layer and the optical component.
    Type: Application
    Filed: August 10, 2004
    Publication date: February 16, 2006
    Inventors: Stephane Bruynooghe, Jens Ullmann
  • Publication number: 20050254120
    Abstract: An optical reproduction system, which can be configured for example as a catadioptric projection lens. This system includes an optical axis and a first deflection mirror, which is tilted in relation to the optical axis at a given tilt angle. One of the deflection mirrors has a ratio Rsp of the reflection coefficient Rs for s-polarised light to the reflection coefficient Rp for p-polarised light, in an incidence angle range that includes the tilt angle, of greater than one, whereas the corresponding ratio for the other deflection mirror is less than one. The deflection mirrors thus ensure that the polarization-dependant influence of the travel light remains minimal.
    Type: Application
    Filed: February 28, 2005
    Publication date: November 17, 2005
    Inventors: Christoph Zaczek, Birgit Kurz, Jens Ullmann, Christian Wagner
  • Publication number: 20050146683
    Abstract: An optical component and a coating system for coating substrates for optical components with essentially rotationally symmetric coatings, the system having a planetary-drive system (1) that has a rotating planet carrier (2) and several planets (4), each of which carries a single substrate, that corotate both with the planet carrier and with respect to the primary carrier. In one embodiment a set of stationary first masks (20) that allow controlling the radial variation in physical film thickness is arranged between a source (8) of material situated beneath the planets and the substrates. A set of second masks that mask off evaporation angles exceeding a limiting evaporation or incidence angle (? max) for every substrate also corotate with the primary carrier (2), which allows depositing coatings having a prescribed radial film-thickness distribution and a virtually constant density of the coating material over their full radial extents for relatively low, and only slightly varying, evaporation angles.
    Type: Application
    Filed: February 9, 2005
    Publication date: July 7, 2005
    Inventors: Harry Bauer, Matthias Heller, Hans-Jochen Paul, Jens Ullmann, Patrick Scheible, Christoph Zaczek
  • Publication number: 20050128655
    Abstract: A pulsed current generator circuit for providing current pulses to a device under test includes a current source for applying a current to the device under test and a controlled current shunt for shunting current from the device under test. A booster circuit is provided for supplying a booster current to the device under test when the controlled current shunt is opened and current again flows through the device under test, thereby facilitating recharge of a parasitic capacitance associated with the device under test.
    Type: Application
    Filed: December 10, 2003
    Publication date: June 16, 2005
    Inventors: Peter Cuevas, Gedaliahoo Krieger, Maurice Evans, Jens Ullmann
  • Patent number: 6863398
    Abstract: A method for coating substrates (10) for optical components with essentially rotationally symmetric coatings employs a coating system equipped with a planetary-drive system (1) that has a rotating planet carrier (2) and several planets (4), each of which carries a single substrate, that corotate both with the planet carrier and with respect to the primary carrier. In one embodiment a set of stationary first masks (20) that allow controlling the radial variation in physical film thickness is arranged between a source (8) of material situated beneath the planets and the substrates. A set of second masks that mask off evaporation angles exceeding a limiting evaporation or incidence angle (? max) for every substrate also corotate with the primary carrier (2), which allows depositing coatings having a prescribed radial film-thickness distribution and a virtually constant density of the coating material over their full radial extents for relatively low, and only slightly varying, evaporation angles.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: March 8, 2005
    Assignee: Carl Zeiss SMT AG
    Inventors: Harry Bauer, Matthias Heller, Hans-Jochen Paul, Jens Ullmann, Patrick Scheible, Christoph Zaczek
  • Patent number: 6842294
    Abstract: A catadioptric objective comprises a plurality of lenses and at least two deflecting mirrors that have reflecting surfaces that are at a specific angle, in particular of 90°, to one another. The two deflecting mirrors are arranged with their reflecting surfaces on a common base member whose position in the objective can be set.
    Type: Grant
    Filed: April 8, 2002
    Date of Patent: January 11, 2005
    Assignee: Carl Zeiss SMT AG
    Inventors: Hubert Holderer, Ulrich Weber, Alexander Kohl, Toralf Gruner, Christoph Zaczek, Jens Ullmann, Martin Weiser, Bernhard Gellrich, Hartmut Muenker
  • Patent number: 6796664
    Abstract: A method and a device for decontaminating optical surfaces, in particular for decontaminating the surfaces of beam-guiding optics employing UV-radiation in a cleansing atmosphere. The wavelength of the UV-radiation employed falls within a range where oxygen strongly absorbs and the cleansing atmosphere has an oxygen concentration less than that of air. The method and device have application to, e.g., cleaning the surfaces of the beam-guiding optics of microlithographic projection-exposure systems.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: September 28, 2004
    Assignee: Carl Zeiss SMT AG
    Inventors: Jens Luedecke, Christoph Zazcek, Alexandra Pazidis, Jens Ullmann, Annette Muehlpfordt, Michael Thier, Stefan Wiesner
  • Publication number: 20030210458
    Abstract: A method and a device for decontaminating optical surfaces, in particular for decontaminating the surfaces of beam-guiding optics employing UV-radiation in a cleansing atmosphere. The wavelength of the UV-radiation employed falls within a range where oxygen strongly absorbs and the cleansing atmosphere has an oxygen concentration less than that of air. The method and device have application to, e.g., cleaning the surfaces of the beam-guiding optics of microlithographic projection-exposure systems.
    Type: Application
    Filed: March 12, 2003
    Publication date: November 13, 2003
    Applicant: CARL ZEISS SMT AG
    Inventors: Jens Luedecke, Christoph Zazcek, Alexandra Pazidis, Jens Ullmann, Annette Muehlpfordt, Michael Thier, Stefan Wiesner