Patents by Inventor Jens Ullmann
Jens Ullmann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9772351Abstract: Pulsed current circuitry for electromigration testing of semiconductor integrated circuits and components. The circuit includes a multiplexer that outputs analog voltage pulses, and is capable of generating both bipolar and unipolar voltage pulses. At least one operational amplifier and resistor receive the voltage pulses from the multiplexer and convert the voltage pulses to current pulses. A charge booster circuit is provided for minimizing overshoots and undershoots during transitions between current levels in the test circuit.Type: GrantFiled: November 7, 2016Date of Patent: September 26, 2017Assignee: QualiTau, Inc.Inventors: Jens Ullmann, Gedaliahoo Krieger, James Borthwick
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Publication number: 20170131327Abstract: Pulsed current circuitry for electromigration testing of semiconductor integrated circuits and components. The circuit includes a multiplexer that outputs analog voltage pulses, and is capable of generating both bipolar and unipolar voltage pulses. At least one operational amplifier and resistor receive the voltage pulses from the multiplexer and convert the voltage pulses to current pulses. A charge booster circuit is provided for minimizing overshoots and undershoots during transitions between current levels in the test circuit.Type: ApplicationFiled: November 7, 2016Publication date: May 11, 2017Inventors: Jens ULLMANN, Gedaliahoo KRIEGER, James BORTHWICK
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Publication number: 20170131326Abstract: Pulsed current circuitry for electromigration testing of semiconductor integrated circuits and components. The circuit includes a multiplexer that outputs analog voltage pulses, and is capable of generating both bipolar and unipolar voltage pulses. At least one operational amplifier and resistor receive the voltage pulses from the multiplexer and convert the voltage pulses to current pulses. A charge booster circuit is provided for minimizing overshoots and undershoots during transitions between current levels in the test circuit.Type: ApplicationFiled: November 10, 2015Publication date: May 11, 2017Inventor: Jens ULLMANN
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Patent number: 7602205Abstract: An electronic device under test (DUT) may be incorporated into a circuit having a voltage limiter connected in parallel with the DUT. The circuit includes a controlled current source having an output current connected in series with the DUT. The voltage limiter is characterized in that, when the output current is such that the voltage across the DUT (Vdut) would exceed a particular maximum voltage Vmax, without the voltage limiter in place, at least a portion of the output current flows through the voltage limiter, so as to limit Vdut to be less than or equal to Vmax. When the output current is such that Vdut would be less than or equal to Vmax, current does not flow through the voltage limiter. The circuit may include a plurality of DUTs, each DUT connected in series with the output current of a controlled current source, with a voltage limiter connected in parallel with each DUT.Type: GrantFiled: February 19, 2008Date of Patent: October 13, 2009Assignee: Qualitau, Inc.Inventor: Jens Ullmann
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Patent number: 7602201Abstract: A test socket assembly is for use in testing integrated circuits. A single piece socket is formed substantially of an insulating material and having a plurality of holes formed therein configured to receive a plurality of electrically conductive springs. Each hole of the single piece socket has therein a separate one of the electrically conductive springs. A test socket includes a plurality of pins configured to receive leads of an integrated circuit, the pins of the test socket extending into the plurality of holes of the single piece socket with each pin engaging a spring, wherein the single piece socket is positioned on a circuit board with the plurality of holes being in alignment with electrical contacts on the circuit board such that the plurality of springs are electrically interconnecting the contacts and the plurality of pins. The single -piece socket is comprised substantially of a high-temperature insulating material, such as ceramic.Type: GrantFiled: June 22, 2007Date of Patent: October 13, 2009Assignee: Qualitau, Inc.Inventors: Jose Ysaguirre, Jens Ullmann, Adalberto M. Ramirez, Robert J. Sylvia
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Patent number: 7598760Abstract: A strip-shaped package is provided that can accept a single die up to many dice. Conduction paths are printed (or otherwise integrally formed) thereon to the edge of the package, and a complementary socket may be provided that, in combination with the strip-shaped package, provides for electrical connection to test electronics without the use of package leads. The strip-shaped package may be made of ceramic or other temperature resistant material. The strip-shaped package may have at least one “well” location in which the die or dice may be affixed to the strip-shaped package. The strip may have notches configured to function as separators between the individual die housings (and related integrally-formed conduction paths).Type: GrantFiled: May 21, 2008Date of Patent: October 6, 2009Assignee: Qualitau, Inc.Inventors: Thomas G. Bensing, Adalberto M. Ramirez, Jens Ullmann, Jacob Herschmann, Robert J. Sylvia, Maurice C. Evans
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Publication number: 20090206869Abstract: An electronic device under test (DUT) may be incorporated into a circuit having a voltage limiter connected in parallel with the DUT. The circuit includes a controlled current source having an output current connected in series with the DUT. The voltage limiter is characterized in that, when the output current is such that the voltage across the DUT (Vdut) would exceed a particular maximum voltage Vmax, without the voltage limiter in place, at least a portion of the output current flows through the voltage limiter, so as to limit Vdut to be less than or equal to Vmax. When the output current is such that Vdut would be less than or equal to Vmax, current does not flow through the voltage limiter. The circuit may include a plurality of DUTs, each DUT connected in series with the output current of a controlled current source, with a voltage limiter connected in parallel with each DUT.Type: ApplicationFiled: February 19, 2008Publication date: August 20, 2009Applicant: QUALITAU, INC.Inventor: Jens Ullmann
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Publication number: 20080315900Abstract: A test socket assembly is for use in testing integrated circuits. A single piece socket is formed substantially of an insulating material and having a plurality of holes formed therein configured to receive a plurality of electrically conductive springs. Each hole of the single piece socket has therein a separate one of the electrically conductive springs. A test socket includes a plurality of pins configured to receive leads of an integrated circuit, the pins of the test socket extending into the plurality of holes of the single piece socket with each pin engaging a spring, wherein the single piece socket is positioned on a circuit board with the plurality of holes being in alignment with electrical contacts on the circuit board such that the plurality of springs are electrically interconnecting the contacts and the plurality of pins. The single -piece socket is comprised substantially of a high-temperature insulating material, such as ceramic.Type: ApplicationFiled: June 22, 2007Publication date: December 25, 2008Applicant: QUALITAU, INC.Inventors: Jose Ysaguirre, Jens Ullmann, Adalberto M. Ramirez, Robert J. Sylvia
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Patent number: 7429856Abstract: A particular configuration of voltage source measurement (VSM) circuitry minimizes common mode errors in measurement of current through a device under test (DUT), even across a wide range of output voltages. The current IDUT is not affected by common-mode errors, since the current measurement is based on the output voltage of an operational amplifier or a differential amplifier, and the circuit configuration is such that the current measurement is made while the operation amplifier or differential amplifier has very low common-mode input voltage.Type: GrantFiled: November 20, 2007Date of Patent: September 30, 2008Assignee: Qualitau, Inc.Inventor: Jens Ullmann
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Patent number: 7172450Abstract: A socket for use in testing packaged integrated circuits having leads depending therefrom includes a first member for receiving the integrated circuit package and having a plurality of holes for receiving leads extending from the package. A second member has a plurality of wire contacts for engaging the leads, the first and second members being arranged to permit relative lateral translation thereof. A support frame includes a first portion which physically engages the first member and a second portion which physically engages the second member. A lever or handle is attached to the second portion and includes a cam surface for engaging a cam follower on the first portion for imparting relative lateral motion between the two members whereby the package leads physically engage wires of the second member.Type: GrantFiled: January 11, 2006Date of Patent: February 6, 2007Assignee: Qualitau, Inc.Inventors: Robert James Sylvia, Adalberto M. Ramirez, Jens Ullmann, Jose Ysaguirre, Peter P. Cuevas, Maurice C. Evans
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Patent number: 7093937Abstract: An optical component and a coating system for coating substrates for optical components with essentially rotationally symmetric coatings, the system having a planetary-drive system (1) that has a rotating planet carrier (2) and several planets (4), each of which carries a single substrate, that corotate both with the planet carrier and with respect to the primary carrier. In one embodiment a set of stationary first masks (20) that allow controlling the radial variation in physical film thickness is arranged between a source (8) of material situated beneath the planets and the substrates. A set of second masks that mask off evaporation angles exceeding a limiting evaporation or incidence angle (? max) for every substrate also corotate with the primary carrier (2), which allows depositing coatings having a prescribed radial film-thickness distribution and a virtually constant density of the coating material over their full radial extents for relatively low, and only slightly varying, evaporation angles.Type: GrantFiled: February 9, 2005Date of Patent: August 22, 2006Assignee: Carl Zeiss SMT AGInventors: Harry Bauer, Matthias Heller, Hans-Jochen Paul, Jens Ullmann, Patrick Scheible, Christoph Zaczek
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Patent number: 7049713Abstract: A pulsed current generator circuit for providing current pulses to a device under test includes a current source for applying a current to the device under test and a controlled current shunt for shunting current from the device under test. A booster circuit is provided for supplying a booster current to the device under test when the controlled current shunt is opened and current again flows through the device under test, thereby facilitating recharge of a parasitic capacitance associated with the device under test.Type: GrantFiled: December 10, 2003Date of Patent: May 23, 2006Assignee: Qualitau, Inc.Inventors: Peter Cuevas, Gedaliahoo Krieger, Maurice Evans, Jens Ullmann
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Publication number: 20060033984Abstract: An assembly includes a holder (5), an optical component (1) transmitting radiation in a first region of ultraviolet (UV) radiation adhered to the holder by an adhesive (4), the adhesive being hardenable by radiation of a second region of ultraviolet radiation, a first layer (3) disposed between the optical component and the adhesive, and a second layer (2) for enhancing adhesion between the optical component and the first layer. The first layer is capable of transmitting radiation of the second region of UV radiation and obstructing to a high degree transmission of UV radiation of the first region by at least one of absorption and reflection. The optical component has a transmitting zone and the first layer is located outside of the transmitting zone. The second layer for enhancing adhesion between the optical component and the first layer is disposed between the first layer and the optical component.Type: ApplicationFiled: August 10, 2004Publication date: February 16, 2006Inventors: Stephane Bruynooghe, Jens Ullmann
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Publication number: 20050254120Abstract: An optical reproduction system, which can be configured for example as a catadioptric projection lens. This system includes an optical axis and a first deflection mirror, which is tilted in relation to the optical axis at a given tilt angle. One of the deflection mirrors has a ratio Rsp of the reflection coefficient Rs for s-polarised light to the reflection coefficient Rp for p-polarised light, in an incidence angle range that includes the tilt angle, of greater than one, whereas the corresponding ratio for the other deflection mirror is less than one. The deflection mirrors thus ensure that the polarization-dependant influence of the travel light remains minimal.Type: ApplicationFiled: February 28, 2005Publication date: November 17, 2005Inventors: Christoph Zaczek, Birgit Kurz, Jens Ullmann, Christian Wagner
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Publication number: 20050146683Abstract: An optical component and a coating system for coating substrates for optical components with essentially rotationally symmetric coatings, the system having a planetary-drive system (1) that has a rotating planet carrier (2) and several planets (4), each of which carries a single substrate, that corotate both with the planet carrier and with respect to the primary carrier. In one embodiment a set of stationary first masks (20) that allow controlling the radial variation in physical film thickness is arranged between a source (8) of material situated beneath the planets and the substrates. A set of second masks that mask off evaporation angles exceeding a limiting evaporation or incidence angle (? max) for every substrate also corotate with the primary carrier (2), which allows depositing coatings having a prescribed radial film-thickness distribution and a virtually constant density of the coating material over their full radial extents for relatively low, and only slightly varying, evaporation angles.Type: ApplicationFiled: February 9, 2005Publication date: July 7, 2005Inventors: Harry Bauer, Matthias Heller, Hans-Jochen Paul, Jens Ullmann, Patrick Scheible, Christoph Zaczek
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Publication number: 20050128655Abstract: A pulsed current generator circuit for providing current pulses to a device under test includes a current source for applying a current to the device under test and a controlled current shunt for shunting current from the device under test. A booster circuit is provided for supplying a booster current to the device under test when the controlled current shunt is opened and current again flows through the device under test, thereby facilitating recharge of a parasitic capacitance associated with the device under test.Type: ApplicationFiled: December 10, 2003Publication date: June 16, 2005Inventors: Peter Cuevas, Gedaliahoo Krieger, Maurice Evans, Jens Ullmann
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Patent number: 6863398Abstract: A method for coating substrates (10) for optical components with essentially rotationally symmetric coatings employs a coating system equipped with a planetary-drive system (1) that has a rotating planet carrier (2) and several planets (4), each of which carries a single substrate, that corotate both with the planet carrier and with respect to the primary carrier. In one embodiment a set of stationary first masks (20) that allow controlling the radial variation in physical film thickness is arranged between a source (8) of material situated beneath the planets and the substrates. A set of second masks that mask off evaporation angles exceeding a limiting evaporation or incidence angle (? max) for every substrate also corotate with the primary carrier (2), which allows depositing coatings having a prescribed radial film-thickness distribution and a virtually constant density of the coating material over their full radial extents for relatively low, and only slightly varying, evaporation angles.Type: GrantFiled: September 17, 2002Date of Patent: March 8, 2005Assignee: Carl Zeiss SMT AGInventors: Harry Bauer, Matthias Heller, Hans-Jochen Paul, Jens Ullmann, Patrick Scheible, Christoph Zaczek
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Patent number: 6842294Abstract: A catadioptric objective comprises a plurality of lenses and at least two deflecting mirrors that have reflecting surfaces that are at a specific angle, in particular of 90°, to one another. The two deflecting mirrors are arranged with their reflecting surfaces on a common base member whose position in the objective can be set.Type: GrantFiled: April 8, 2002Date of Patent: January 11, 2005Assignee: Carl Zeiss SMT AGInventors: Hubert Holderer, Ulrich Weber, Alexander Kohl, Toralf Gruner, Christoph Zaczek, Jens Ullmann, Martin Weiser, Bernhard Gellrich, Hartmut Muenker
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Patent number: 6796664Abstract: A method and a device for decontaminating optical surfaces, in particular for decontaminating the surfaces of beam-guiding optics employing UV-radiation in a cleansing atmosphere. The wavelength of the UV-radiation employed falls within a range where oxygen strongly absorbs and the cleansing atmosphere has an oxygen concentration less than that of air. The method and device have application to, e.g., cleaning the surfaces of the beam-guiding optics of microlithographic projection-exposure systems.Type: GrantFiled: March 12, 2003Date of Patent: September 28, 2004Assignee: Carl Zeiss SMT AGInventors: Jens Luedecke, Christoph Zazcek, Alexandra Pazidis, Jens Ullmann, Annette Muehlpfordt, Michael Thier, Stefan Wiesner
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Publication number: 20030210458Abstract: A method and a device for decontaminating optical surfaces, in particular for decontaminating the surfaces of beam-guiding optics employing UV-radiation in a cleansing atmosphere. The wavelength of the UV-radiation employed falls within a range where oxygen strongly absorbs and the cleansing atmosphere has an oxygen concentration less than that of air. The method and device have application to, e.g., cleaning the surfaces of the beam-guiding optics of microlithographic projection-exposure systems.Type: ApplicationFiled: March 12, 2003Publication date: November 13, 2003Applicant: CARL ZEISS SMT AGInventors: Jens Luedecke, Christoph Zazcek, Alexandra Pazidis, Jens Ullmann, Annette Muehlpfordt, Michael Thier, Stefan Wiesner