Patents by Inventor Jens Zimmermann

Jens Zimmermann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240150982
    Abstract: A piste grooming vehicle having at least one piste grooming device for preparing a piste. The piste grooming vehicle has a detection device configured to detect an actual topography of a piste section, positioned in front of the piste grooming vehicle in the forward travel direction thereof, of the piste, a determining device connected to the detection device and configured to determine at least one differential value between coordinates of the actual topography and coordinates of a reference topography of the piste, and a control device connected to the determining device and configured to actuate the at least one piste grooming device in accordance with the at least one determined differential value.
    Type: Application
    Filed: January 16, 2024
    Publication date: May 9, 2024
    Inventors: Peter BETZ, Olivier HARGOAA, Michael KUHN, Jens ROTTMAIR, Jonathan ZIMMERMANN
  • Patent number: 11970828
    Abstract: The invention relates to a piste grooming vehicle having at least one piste grooming device for preparing a piste and to a method for operating such a piste grooming vehicle. Use in grooming ski pistes or snowboard pistes.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: April 30, 2024
    Assignee: KĂ„SSBOHRER GELĂ„NDEFAHRZEUG AG
    Inventors: Peter Betz, Olivier Hargoaa, Michael Kuhn, Jens Rottmair, Jonathan Zimmermann
  • Patent number: 9090828
    Abstract: A device for converting biomass with a water content of at least 50% to gaseous products includes a reactor filled at least partially with a packing including at least one filler body for accommodating supercritical water and a hydrothermal molten salt. A heater is arranged to heat up the reactor and its content. A first feeding pipe is coupled to the reactor to feed water and salt solution into the reactor. A second feeding pipe is coupled to the reactor to feed to biomass into the reactor. A discharge pipe is coupled to the reactor to discharge gaseous products from the reactor. An outlet is proved in the bottom of the reactor for removing portions of the molten salt.
    Type: Grant
    Filed: March 20, 2013
    Date of Patent: July 28, 2015
    Assignee: Karlsruhe Institute of Technology (KIT)
    Inventors: Nicolaus Dahmen, Andrea Kruse, Mathias Pagel, Hubert Goldacker, Jens Zimmermann
  • Publication number: 20090308726
    Abstract: A device for converting biomass with a water content of at least 50% to gaseous products includes a reactor filled at least partially with a packing including at least one filler body for accommodating supercritical water and a hydrothermal molten salt. A heater is arranged to heat up the reactor and its content. A first feeding pipe is coupled to the reactor to feed water and salt solution into the reactor. A second feeding pipe is coupled to the reactor to feed to biomass into the reactor. A discharge pipe is coupled to the reactor to discharge gaseous products from the reactor. An outlet is proved in the bottom of the reactor for removing portions of the molten salt.
    Type: Application
    Filed: June 17, 2009
    Publication date: December 17, 2009
    Applicant: Forschungszentrum Karlsruhe GmbH
    Inventors: NICHOLAUS DAHMEN, Andrea Kruse, Mathias Pagel, Hubert Goldacker, Jens Zimmermann
  • Patent number: 6878613
    Abstract: A field-effect transistor is formed with a gate stack, which is patterned by a hard mask and contains a first part of a gate electrode and a second part of the gate electrode that is disposed on the first part. The second part of the gate electrode, which is disposed between the patterned hard mask and the first part of the gate electrode, is laterally recessed, so that the second part of the gate electrode, in a contact hole which is subsequently formed, is at a greater distance from a contact plug with which the contact hole is filled, in order to avoid short circuits.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: April 12, 2005
    Assignee: Infineon Technologies AG
    Inventors: Bernd Stottko, Martin Welzel, Jens Zimmermann
  • Patent number: 6780552
    Abstract: After exposing a semiconductor wafer, quality parameters, for example, the critical dimension, the overlay accuracy, and alignment parameters, etc. are measured in successive inspections and are compared with tolerance range widths that are specified dynamically by calculating the range from measured values of one or more of the other quality parameters. For example, the tolerance range width for the overlay accuracy can be increased for smaller measured critical dimension values of the same structures without affecting the functionality of the integrated circuit. Using a forward mechanism, the tolerance ranges can also be adjusted with the quality parameter measurements from a first layer to the quality parameter tolerance range width of a second layer.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: August 24, 2004
    Assignee: Infineon Technologies AG
    Inventors: Thorsten Schedel, Jens Zimmermann, Sebastian Schmidt
  • Patent number: 6583020
    Abstract: A method for fabricating a trench isolation for electrically active components in a semiconductor component. A mask is applied to a semiconductor substrate. Subsequently, a trench having side walls is formed in the semiconductor substrate by performing a dry etching process using at least one etching gas such that during the dry etching process, polymers are produced that at least partly cover the side walls of the trench and thereby at least partially protect the side walls against an etching attack from the etching gas. The etching gas is provided with a compound that is selected from the group consisting of at least one hydrocarbon compound and a fluorinated hydrocarbon compound. The trench is filled with an insulating oxide.
    Type: Grant
    Filed: September 11, 2001
    Date of Patent: June 24, 2003
    Assignee: Infineon Technologies AG
    Inventors: Ines Uhlig, Jens Zimmermann, Stephan Wege
  • Publication number: 20030042517
    Abstract: A field-effect transistor is formed with a gate stack, which is patterned by a hard mask and contains a first part of a gate electrode and a second part of the gate electrode that is disposed on the first part. The second part of the gate electrode, which is disposed between the patterned hard mask and the first part of the gate electrode, is laterally recessed, so that the second part of the gate electrode, in a contact hole which is subsequently formed, is at a greater distance from a contact plug with which the contact hole is filled, in order to avoid short circuits.
    Type: Application
    Filed: August 30, 2002
    Publication date: March 6, 2003
    Inventors: Bernd Stottko, Martin Welzel, Jens Zimmermann
  • Publication number: 20030039905
    Abstract: After exposing a semiconductor wafer, quality parameters, for example, the critical dimension, the overlay accuracy, and alignment parameters, etc. are measured in successive inspections and are compared with tolerance range widths that are specified dynamically by calculating the range from measured values of one or more of the other quality parameters. For example, the tolerance range width for the overlay accuracy can be increased for smaller measured critical dimension values of the same structures without affecting the functionality of the integrated circuit. Using a forward mechanism, the tolerance ranges can also be adjusted with the quality parameter measurements from a first layer to the quality parameter tolerance range width of a second layer.
    Type: Application
    Filed: June 19, 2002
    Publication date: February 27, 2003
    Inventors: Thorsten Schedel, Jens Zimmermann, Sebastian Schmidt
  • Publication number: 20020086478
    Abstract: A method for fabricating a trench isolation for electrically active components in a semiconductor component. A mask is applied to a semiconductor substrate. Subsequently, a trench having side walls is formed in the semiconductor substrate by performing a dry etching process using at least one etching gas such that during the dry etching process, polymers are produced that at least partly cover the side walls of the trench and thereby at least partially protect the side walls against an etching attack from the etching gas. The etching gas is provided with a compound that is selected from the group consisting of at least one hydrocarbon compound and a fluorinated hydrocarbon compound. The trench is filled with an insulating oxide.
    Type: Application
    Filed: September 11, 2001
    Publication date: July 4, 2002
    Inventors: Ines Uhlig, Jens Zimmermann, Stephan Wege
  • Patent number: 6255193
    Abstract: The fabrication method provides for an etched isolation trench to be lined, if appropriate firstly with a thin thermal oxide layer, and then with an oxidizable auxiliary layer. The auxiliary layer consumes oxygen during subsequent thermal processes, thereby avoiding oxidation of deeper structures, in particular of an insulation collar in a capacitor trench.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: July 3, 2001
    Assignee: Infineon Technologies AG
    Inventors: Hans-Peter Sperlich, Jens Zimmermann