Abstract: A computer chassis, including a number of removable walls wherein each removable wall includes a first side rail system comprising a number of first rails to receive a first size of a blade component, and a second side rail system comprising a number of second rails to receive a second size of a blade component. A removable wall for a chassis including a first side comprising a first number of and arrangement of rails and a second side comprising a second number of and arrangement of rails.

Abstract: An example adapter assembly may comprise an adapter cage to removably mount to a riser board of a computer system. Further, the example adapter assembly may comprise an adapter board disposed on the adapter cage, wherein the adapter cage is to receive multiple computer components, and the adapter board is to engage with the multiple computer components.

Abstract: A computer chassis, including a number of removable walls wherein each removable wall includes a first side rail system comprising a number of first rails to receive a first size of a blade component, and a second side rail system comprising a number of second rails to receive a second size of a blade component. A removable wall for a chassis including a first side comprising a first number of and arrangement of rails and a second side comprising a second number of and arrangement of rails.

Abstract: An example adapter assembly may comprise an adapter cage to removably mount to a riser board of a computer system. Further, the example adapter assembly may comprise an adapter board disposed on the adapter cage, wherein the adapter cage is to receive multiple computer components, and the adapter board is to engage with the multiple computer components.

Abstract: An example computer chassis can include a first card slot, a second card slot, and a rear wall. The first card slot can be configurable to a full height position. The second card slot can be configurable to one of a full height position and a low profile position.

Abstract: An example computer chassis can include a first card slot, a second card slot, and a rear wall. The first card slot can be configurable to a full height position. The second card slot can be configurable to one of a full height position and a low profile position.

Abstract: A computer system comprising a computer chassis supporting at least one electronic component, the computer chassis having a volume and at least one interactive surface; an indicator panel supported by the computer chassis and coupled to the electronic component, the indicator panel having a display and an outer edge; wherein the indicator panel comprises a first position wherein the indicator panel is received within an aperture in the interactive surface, the indicator panel and the display are disposed within the chassis volume, and the outer edge is exposed and indicates a condition of the electronic component.

Abstract: A computer system powers off upon operation of a power switch when the power switch is enabled. A switch mask enables and disables the power switch without intervention by an operating system of the computer system.

Abstract: A computer system comprising a computer chassis supporting at least one electronic component, the computer chassis having a volume and at least one interactive surface; an indicator panel supported by the computer chassis and coupled to the electronic component, the indicator panel having a display and an outer edge; wherein the indicator panel comprises a first position wherein the indicator panel is received within an aperture in the interactive surface, the indicator panel and the display are disposed within the chassis volume, and the outer edge is exposed and indicates a condition of the electronic component.

Abstract: The specification discloses a server system implementing hot pluggable memory boards in an architecture using X86 processors and off-the-shelf operating system, such as Windows® or Netware, which do not support hot plugging operations. Thus, the specification discloses systems and related methods for hot plugging main memory boards transparent to, and without the help of, the operating system. The operating system need only have the ability to recognize additional memory in order to use it. Moreover, the specification discloses a related set of memory error detection and correction techniques, again which are implementing transparent to, and without the help of, the operating system.

Abstract: A computer system implements hot mirroring for main system memory. That is, the computer system permits a user to hot plug a new memory board into the system and the system will respond by switching to a mirrored memory mode in which write cycles are performed to both memory boards (new and old). Once a new board is hot plugged into the system, the contents of the old board are copied over, in a background mode, to the new board so that both boards will have the same data. Because this background copying process may take a non-trivial amount of time and may detrimentally interfere with other system traffic, the system a user to exert control over the relative speed of the background copying so as to trade-off the time it takes to switch over to the mirroring mode versus the impact on on-going system behavior.

Abstract: The system and methods describe a computer system implementing an adjustable control signal path whose length may be precisely adjusted to control timing of a control signal that propagates along the path. One such adjustable signal path has two clusters of possible signal paths. Each of the signal paths in each cluster has a length, and the overall length of the control signal path may be adjusted by selectively implementing one signal path from each of the clusters by electrically connecting that path into the electrical circuit by the selective installation of zero ohm resistors. In this way, a system designer may design several possible signal path lengths on to a motherboard or printed circuit card, and implement the path length which provides the most precise signal timing adjustment.

Abstract: A computer system is adapted for indicating current operating speeds of a plurality of expansion slots. The computer system includes a set of expansion slot speed indicators to indicate the current operating speeds.

Abstract: The specification discloses a server system implementing hot pluggable memory boards in an architecture using X86 processors and off-the-shelf operating system, such as Windows® or Netware, which do not support hot plugging operations. Thus, the specification discloses systems and related methods for hot plugging main memory boards transparent to, and without the help of, the operating system. The operating system need only have the ability to recognize additional memory in order to use it. Moreover, the specification discloses a related set of memory error detection and correction techniques, again which are implementing transparent to, and without the help of, the operating system.

Abstract: A computer system implements hot mirroring for main system memory. That is, the computer system permits a user to hot plug a new memory board into the system and the system will respond by switching to a mirrored memory mode in which write cycles are performed to both memory boards (new and old). Once a new board is hot plugged into the system, the contents of the old board are copied over, in a background mode, to the new board so that both boards will have the same data. Because this background copying process may take a non-trivial amount of time and may detrimentally interfere with other system traffic, the system a user to exert control over the relative speed of the background copying so as to trade-off the time it takes to switch over to the mirroring mode versus the impact on on-going system behavior.

Abstract: The system and methods describe a computer system implementing an adjustable control signal path whose length may be precisely adjusted to control timing of a control signal that propagates along the path. One such adjustable signal path has two clusters of possible signal paths. Each of the signal paths in each cluster has a length, and the overall length of the control signal path may be adjusted by selectively implementing one signal path from each of the clusters by electrically connecting that path into the electrical circuit by the selective installation of zero ohm resistors. In this way, a system designer may design several possible signal path lengths on to a motherboard or printed circuit card, and implement the path length which provides the most precise signal timing adjustment.

Abstract: A multiprocessor computer includes a processor disabling scheme which disables a processor that has been designated to boot the computer but fails to boot the computer. For computers having voltage regulator modules (VRMs) to power each processor, a control device directs a VRM associated with the failed boot processor to cease supplying power in response to the processor's failure. For computers without VRMs, a transistor controls the delivery of power from the power supply to each respective processor. If a designated boot processor fails to boot the system, the control device turns off the appropriate transistor to disable the failed processor.

Abstract: A computer system that provides for transparent plugging and unplugging of a keyboard independent of system operation. A virtual keyboard device communicates with the system keyboard controller when no keyboard is plugged. The virtual keyboard device provides appropriate responses to inquiries from the operating system during startup, allowing the system to boot without an actual keyboard being present. When a keyboard is plugged, its presence is detected and it is configured by a virtual keyboard controller. The newly configured keyboard is then coupled to the system keyboard controller. On unplug, the lack of a keyboard is detected by monitoring the power supply to the keyboard, whereupon the virtual keyboard is again coupled to the system keyboard controller.

Abstract: An apparatus supports the sharing of a resource among computer applications. The computer system has a processor which adapted for executing a first application in a first mode of operation and a second application in a second mode of operation. The computer system also has a communication port adapted to receive the resource. The communication port is normally allocated to receive accesses from the second application. The computer system also has a virtual port for emulating the communication port. The virtual port diverts accesses from the first application directed at the communication port and buffers the accesses in the virtual port. An arbitrator is connected to the processor, the communication port, and the virtual port. The arbitrator claims the communication port from the second application and forwards accesses received by the virtual port to the communication port if the first application is accessing the resource and if the communication port is idle.