Patents by Inventor Jeom D. Lee

Jeom D. Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5619526
    Abstract: A base station modulator for the digital cellular mobile communication system achieves reduced hardware complexity in a base band QPSK modulating circuit by applying the Multilevel Logic Operation (MLO) which is extended from the conventional binary exclusive-OR operation, to the conventional Base Station Modulator (BSM). The base station modulator includes a plurality of spreaders 621 for QPSK spreading of a voice data stream. These spreaders 621 employ binary-multilevel Logic (MLO) gates instead of multiple binary exclusive-OR gates. The binary-multilevel Logic gate includes a subtractor 510 and a selector 520. The subtractor has one input (-) to which multilevel logic values are applied and one input (+) to which a maximum logic level of the multilevel logic values is applied. The selector has one input to which the multilevel logic values are applied, one input to which the output signal of the subtractor 510 is applied, and one control input to which the binary logic value is applied.
    Type: Grant
    Filed: November 23, 1994
    Date of Patent: April 8, 1997
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jin U. Kim, Sun Y. Kim, Jeom D. Lee, Sung K. Lee
  • Patent number: 5471156
    Abstract: To provide a binary-multilevel OR gate, a binary-multilevel AND gate, a binary-multilevel EXCLUSIVE OR gate and their operational methods, which enable direct logic operations between multilevel logic values and binary logic values, including logic operations between binary numbers, the present invention comprises a switch for performing binary-multilevel OR gate operations, which select and output according to binary logic signal values only an input out of its both inputs of a multilevel logic signal and a maximum value of the multilevel logic signal; a switch for performing binary-multilevel AND gate operations, which select and output according to binary logic signals only an input out of its both inputs of multilevel logic signals and a minimum value of the multilevel logic signal; and a switch for performing binary-multilevel EXCLUSIVE OR gate operations, which select and output according to binary logic signals only an input out of its both inputs of a multilevel logic signal and the complementary valu
    Type: Grant
    Filed: November 30, 1994
    Date of Patent: November 28, 1995
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jin U. Kim, Sun Y. Kim, Jeom D. Lee