Patents by Inventor Jeon-teak IM

Jeon-teak IM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9268500
    Abstract: A memory module includes a first storage module including a first module controller and a first memory unit. The first storage module is configured to receive first partial data from a host and write the first partial data to the first memory unit. A second storage module includes a second module controller and a second memory unit. The second storage module is configured to receive second partial data from the host and write the second partial data to the second memory unit. The first storage module and the second storage module are configured to connect to the host through a single host interface bus.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: February 23, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeon-teak Im, Tae-gyun Kim, Jae-young Choi
  • Publication number: 20140059280
    Abstract: A memory module includes a first storage module including a first module controller and a first memory unit. The first storage module is configured to receive first partial data from a host and write the first partial data to the first memory unit. A second storage module includes a second module controller and a second memory unit. The second storage module is configured to receive second partial data from the host and write the second partial data to the second memory unit. The first storage module and the second storage module are configured to connect to the host through a single host interface bus.
    Type: Application
    Filed: August 27, 2013
    Publication date: February 27, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeon-teak IM, Tae-gyun KIM, Jae-young CHOI
  • Publication number: 20140059276
    Abstract: A memory module includes a first storage module including a first module controller and a first memory unit. The first storage module is configured to receive first partial data from a host and write the first partial data to the first memory unit. A second storage module includes a second module controller and a second memory unit. The second storage module is configured to receive second partial data from the host and write the second partial data to the second memory unit. The first storage module and the second storage module are configured to connect to the host through a single host interface bus.
    Type: Application
    Filed: August 26, 2013
    Publication date: February 27, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeon-teak IM, Tae-gyun KIM, Jae-young CHOI