Patents by Inventor Jeong Chang-Wook

Jeong Chang-Wook has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multiple level cell phase-change memory devices having pre-reading operation resistance drift recovery, memory systems employing such devices and methods of reading memory devices
    Patent number: 8199567
    Abstract: A memory device comprises a plurality of memory cells, each memory cell comprising a memory cell material that has an initial resistance that is determined in response to an applied programming current in a programming operation, the resistance of the memory cell varying from the initial resistance over a time period following the programming operation, and each memory cell being connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a read operation. A modification circuit modifies the resistance of a memory cell of the plurality of memory cells selected for a read operation to return its resistance to near the initial resistance prior to a read operation of the memory cell.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: June 12, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong Chang-Wook, Gi-Tae Jeong, Hyeong-Jun Kim, Seung-Pil Ko
  • MULTIPLE LEVEL CELL PHASE-CHANGE MEMORY DEVICES HAVING PRE-READING OPERATION RESISTANCE DRIFT RECOVERY, MEMORY SYSTEMS EMPLOYING SUCH DEVICES AND METHODS OF READING MEMORY DEVICES
    Publication number: 20110188304
    Abstract: A memory device comprises a plurality of memory cells, each memory cell comprising a memory cell material that has an initial resistance that is determined in response to an applied programming current in a programming operation, the resistance of the memory cell varying from the initial resistance over a time period following the programming operation, and each memory cell being connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a read operation. A modification circuit modifies the resistance of a memory cell of the plurality of memory cells selected for a read operation to return its resistance to near the initial resistance prior to a read operation of the memory cell.
    Type: Application
    Filed: April 12, 2011
    Publication date: August 4, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong Chang-Wook, Gi-Tae Jeong, Hyeong-Jun Kim, Seung-Pil Ko
  • Multiple level cell phase-change memory device having pre-reading operation resistance drift recovery, memory systems employing such devices and methods of reading memory devices
    Patent number: 7940552
    Abstract: A memory device comprises a plurality of memory cells, each memory cell comprising a memory cell material that has an initial resistance that is determined in response to an applied programming current in a programming operation, the resistance of the memory cell varying from the initial resistance over a time period following the programming operation, and each memory cell being connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a read operation. A modification circuit modifies the resistance of a memory cell of the plurality of memory cells selected for a read operation to return its resistance to near the initial resistance prior to a read operation of the memory cell.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: May 10, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong Chang-Wook, Gi-Tae Jeong, Hyeong-Jun Kim, Seung-Pil Ko