Patents by Inventor Jeong-Eui Hong

Jeong-Eui Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6613670
    Abstract: The method of the present invention includes providing a silicon substrate having an impurity region, forming an inter-layer insulating film having a contact hole in the impurity region and forming a titanium film and titanium nitride film in the contact hole. The method of the present invention further includes conducting a heat treatment to cause a reaction between the titanium film and the silicon substrate and forming a tungsten plug on the titanium nitride film in the contact hole. The device of the present invention including the bit lines are made up of a first inter-layer insulating film on the substrate having a first contact hole over the impurity region, a titanium film in the first contact hole, a titanium nitride film on the titanium film, a titanium silicide film on the silicon substrate wherein the titanium silicide film does not include an agglomerate, a tungsten plug on the titanium nitride film in the first contact hole and a circuit element on the first inter-layer insulating film.
    Type: Grant
    Filed: November 18, 1999
    Date of Patent: September 2, 2003
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Sa Kyun Rha, Jeong Eui Hong, Young Jun Lee
  • Patent number: 6440848
    Abstract: A method for forming an interconnection of a semiconductor device including a step of sequentially stacking a first insulation layer, a first semiconductor layer, a barrier metal layer and a second semiconductor layer on a semiconductor substrate, a step of forming an amorphous first tungsten silicide layer on the second semiconductor layer, a step of transforming the first tungsten silicide layer into a second tungsten silicide layer having a tetragonal crystal structure by an annealing process; a step of forming an etching mask on the second tungsten silicide layer, and a step of sequentially selectively etching the second tungsten silicide layer, the second semiconductor layer, the barrier metal layer and the first semiconductor layer by employing the etching mask.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: August 27, 2002
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jeong-Eui Hong
  • Publication number: 20020037644
    Abstract: The method of the present invention includes providing a silicon substrate having an impurity region, forming an inter-layer insulating film having a contact hole in the impurity region and forming a titanium film and titanium nitride film in the contact hole. The method of the present invention further includes conducting a heat treatment to cause a reaction between the titanium film and the silicon substrate and forming a tungsten plug on the titanium nitride film in the contact hole.
    Type: Application
    Filed: November 18, 1999
    Publication date: March 28, 2002
    Inventors: SA KYUN RHA, JEONG EUI HONG, YOUNG JUN LEE
  • Patent number: 6180522
    Abstract: The present invention relates to a method of forming a contact in semiconductor device, more particularly, to a method of forming a tungsten bitline contact in a semiconductor device which prevents the decrease of impurity ion density in an impurity region and reduces both contact resistance between a plug and the impurity region and leakage current in a junction by forming an extra barrier layer in a metal barrier layer having been deposited on the impurity region, thereby improving operation speed of a semiconductor device and lessening power consumption.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: January 30, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Jeong-Eui Hong