Abstract: An image sensing device includes a first sampling circuit suitable for sampling a reference ramp signal as a ramp signal; a switching circuit suitable for sequentially outputting first and second pixel signals to a common node based on first and second control signals; a second sampling circuit suitable for sampling the first and second pixel signals, which are sequentially outputted through the common node, as a measurement signal; a comparison circuit suitable for comparing the ramp signal with the measurement signal and generating a comparison signal corresponding to a comparison result; and a count circuit suitable for generating a count signal, which corresponds to a voltage level of the measurement signal, based on the comparison signal and a clock signal.

Abstract: An image sensing device includes a first sampling circuit suitable for sampling a reference ramp signal as a ramp signal; a switching circuit suitable for sequentially outputting first and second pixel signals to a common node based on first and second control signals; a second sampling circuit suitable for sampling the first and second pixel signals, which are sequentially outputted through the common node, as a measurement signal; a comparison circuit suitable for comparing the ramp signal with the measurement signal and generating a comparison signal corresponding to a comparison result; and a count circuit suitable for generating a count signal, which corresponds to a voltage level of the measurement signal, based on the comparison signal and a clock signal.

Abstract: Disclosed is an image sensor including a plurality of selection circuits each suitable for receiving two clock signals among an input clock signal and a plurality of delayed clock signals, and outputting, as each of a plurality of selection clock signals, one selection clock signal between the two clock signals on the basis of a control signal; and a plurality of buffer circuits suitable for generating the plurality of delayed clock signals on the basis of the plurality of selection clock signals outputted from the plurality of selection circuits.

Abstract: An image sensing device includes a first sampling circuit suitable for sampling a reference ramp signal as a ramp signal; a switching circuit suitable for sequentially outputting first and second pixel signals to a common node based on first and second control signals; a second sampling circuit suitable for sampling the first and second pixel signals, which are sequentially outputted through the common node, as a measurement signal; a comparison circuit suitable for comparing the ramp signal with the measurement signal and generating a comparison signal corresponding to a comparison result; and a count circuit suitable for generating a count signal, which corresponds to a voltage level of the measurement signal, based on the comparison signal and a clock signal.

Abstract: Disclosed is an image sensor including first and second pixels arranged in a first row, for outputting first and second pixel signals through first and third column lines during a unit row time; third and fourth pixels arranged in a second row, for outputting third and fourth pixel signals through second and fourth column lines during the unit row time; an alignment circuit for aligning the first to fourth pixel signals for each row, and outputting first to fourth alignment signals, according to control signals; a first signal conversion circuit for generating a first depth information signal corresponding to a difference in voltage levels between the first and second alignment signals, through one A/D conversion operation; and a second signal conversion circuit for generating a second depth information signal, corresponding to a difference in voltage levels between the third and fourth alignment signals, through one A/D conversion operation.

Abstract: An image sensor includes at least two pixels and a control circuit. The control circuit is configured to provide a first modulation voltage and a second modulation voltage having a phase difference of 180 degrees from each other to each of the at least two pixels in a first mode. The control circuit is also configured to provide the first modulation voltage to a first pixel among the at least two pixels and provide the second modulation voltage to a second pixel among the at least two pixels in a second mode.

Abstract: Disclosed is an image sensing device including a first clock distributor suitable for receiving a first input clock signal through a first input terminal, and outputting a plurality of first output clock signals through a plurality of first output terminals, and a first conductive line coupled in common to the plurality of first output terminals.

Abstract: An image sensing device includes: a control circuit coupled between an output terminal of a pixel signal and a high voltage terminal, and configured to generate a control voltage corresponding to a voltage level of the pixel signal; and a current supplying circuit coupled between the output terminal and the high voltage terminal, and configured to supply a pre-charge current, which is configured to be adaptively adjusted according to the voltage level of the pixel signal, to the output terminal based on the control voltage.

Abstract: Disclosed is an image sensing device including a first clock distributor suitable for receiving a first input dock signal through a first input terminal, and outputting a plurality of first output clock signals through a plurality of first output terminals, and a first conductive line coupled in common to the plurality of first output terminals.

Abstract: Disclosed is an image sensor including a buffer circuit suitable for generating, based on at least one first signal, at least one second signal controlled during each of settling and comparison periods, a comparison circuit suitable for using an operating current having a relatively high level during the settling period and a relatively low level during the comparison period based on the second signal, and comparing a pixel signal with a ramp signal during the comparison period to generate a comparison signal.

Abstract: An image sensing device includes: a control circuit coupled between an output terminal of a pixel signal and a high voltage terminal, and configured to generate a control voltage corresponding to a voltage level of the pixel signal; and a current supplying circuit coupled between the output terminal and the high voltage terminal, and configured to supply a pre-charge current, which is configured to be adaptively adjusted according to the voltage level of the pixel signal, to the output terminal based on the control voltage.

Abstract: Disclosed is an image sensor including a plurality of selection circuits each suitable for receiving two clock signals among an input clock signal and a plurality of delayed clock signals, and outputting, as each of a plurality of selection clock signals, one selection clock signal between the two clock signals on the basis of a control signal; and a plurality of buffer circuits suitable for generating the plurality of delayed clock signals on the basis of the plurality of selection clock signals outputted from the plurality of selection circuits.

Abstract: Disclosed is an image sensing device including a plurality of current cells whose total number to be used is adjusted based on a plurality of enable signals, and which are sequentially controlled based on a reset signal and a plurality of selection signals; a current-voltage conversion circuit suitable for converting a plurality of unit currents, which are supplied from current cells used among the plurality of current cells, into a ramp signal; and a first control circuit suitable for generating the plurality of enable signals based on a maximum conversion code value corresponding to a slope of the ramp signal.

Abstract: A semiconductor memory device includes a substrate including a trench and a contact recess, a direct contact placed inside the trench and having a width smaller than a width of the trench, a bit line structure placed on the direct contact and having a width smaller than the width of the trench, a spacer structure placed on side surfaces of the direct contact and the bit line structure, and a buried contact spaced apart from the direct contact and the bit line structure by the spacer structure and filling the contact recess. The spacer structure includes an oxide film placed between the direct contact and the buried contact inside the trench, a seed layer placed on the oxide film inside the trench between the direct contact and the buried contact, and a bulk layer filling the trench on the seed layer and including silicon nitride. The seed layer includes carbon.

Abstract: An image sensor includes: a pixel of a first tab; a pixel of a second tab; an operation amplifier suitable for comparing, in a comparison operation, a pixel signal of the first tab and a pixel signal of the second tab with each other to produce a comparison result, receiving, in an auto-zeroing operation, a ramp voltage and a selected pixel signal which is selected based on the comparison result between the pixel signal of the first tab and the pixel signal of the second tab, and receiving, in an analog-to-digital conversion operation, the ramp voltage and an unselected pixel signal which is not selected from the pixel signal of the first tab and the second pixel signal of the second tab; and a counter circuit suitable for generating a digital code based on an output of the operation amplifier.

Abstract: An image sensing device includes an optical emitter outputting a modulated signal to a target object; an optical receiver generating, according to a phase control signal, pixel signals corresponding to a reflected signal from the target object; an image processor calculating a depth phase based on the pixel signals and compensating for the depth phase according to a phase offset signal to output a depth information signal; a driving control circuit generating the phase control signal corresponding to a phase of the modulated signal and setting an initial phase difference between the modulated signal and the phase control signal according to the phase offset signal; and an offset calculating circuit setting a plurality of reference phases, selecting a reference phase closest to the depth phase among the set reference phases and generating the phase offset signal representing a phase difference between the selected reference phase and the depth phase.

Abstract: An analog-to-digital converting circuit includes: an analog-to-digital converter suitable for performing an analog-to-digital conversion on pixel signals of a plurality of pixels provided in a pixel array; a ramp signal generator suitable for providing a ramp signal to the analog-to-digital converter; and an auto-zero controller suitable for providing a reference voltage to the analog-to-digital converter to perform an auto-zeroing operation by using a row pixel for which a readout operation is performed by the analog-to-digital converter.

Abstract: An image sensing device includes at least one unit pixel including a plurality of pixels for generating a plurality of pixel signals based on a plurality of control signals having different phases, and an equalizing circuit suitable for equalizing noise that occurs in the plurality of pixels during a reset operation on the unit pixel.

Abstract: An analog-to-digital converting circuit includes: an analog-to-digital converter suitable for performing an analog-to-digital conversion on pixel signals of a plurality of pixels provided in a pixel array; a ramp signal generator suitable for providing a ramp signal to the analog-to-digital converter; and an auto-zero controller suitable for providing a reference voltage to the analog-to-digital converter to perform an auto-zeroing operation by using a row pixel for which a readout operation is performed by the analog-to-digital converter.

Abstract: An analog-to-digital converter circuit includes: a first operation amplifier suitable for comparing a ramp voltage and a voltage to be converted so as to produce an amplification result and outputting the amplification result; a second operation amplifier suitable for comparing the amplification result transferred to a first input terminal with a reference voltage transferred to a second input terminal so as to produce a comparison result and outputting the comparison result; a leakage current measurer suitable for measuring a leakage current to the first input terminal; and a leakage current generator suitable for causing a current of the same amount as that of the leakage current measured by the leakage current measurer to flow to the second input terminal.