Abstract: An organic light emitting display device and a method of fabricating thereof are discussed. The organic light emitting display device according to an example includes a plurality of first bank layers arranged along a first direction and a second direction on a substrate to define a plurality of pixels; a plurality of second bank layers disposed along the first direction on the first bank layers to divide the columns of pixels having different colors; an organic light emitting layer in each pixel; at least one first pocket pixel unit at both sides of the pixel having the smallest area; and a first dummy organic light emitting layer in the first pocket pixel unit.

Abstract: An electroluminescent display device comprises a substrate; a plurality of sub-pixels arranged on the substrate, including sub-pixels with different colors arranged along a first direction and sub-pixels with a same color arranged along a second direction; a light-emitting diode disposed at each sub-pixel and including a first electrode, a light-emitting layer and a second electrode; a bank having an opening corresponding to a sub-pixel row along the second direction and disposed between two adjacent sub-pixels along the first direction; and a control pattern between two adjacent sub-pixels along the second direction, wherein the control pattern includes a first control pattern corresponding to a center portion of the sub-pixel row and a second control pattern spaced apart from the first control pattern along the second direction, and where a first end of each of the first and second control patterns is spaced apart from the bank and has an first surface parallel to or inclined with respect to the second dire

Abstract: An electroluminescent display device comprises a substrate; a plurality of sub-pixels arranged on the substrate, including sub-pixels with different colors arranged along a first direction and sub-pixels with a same color arranged along a second direction; a light-emitting diode disposed at each sub-pixel and including a first electrode, a light-emitting layer and a second electrode; a bank having an opening corresponding to a sub-pixel row along the second direction and disposed between two adjacent sub-pixels along the first direction; and a control pattern between two adjacent sub-pixels along the second direction, wherein the control pattern includes a first control pattern corresponding to a center portion of the sub-pixel row and a second control pattern spaced apart from the first control pattern along the second direction, and where a first end of each of the first and second control patterns is spaced apart from the bank and has an first surface parallel to or inclined with respect to the second dire

Abstract: An organic light emitting display device and a method of fabricating thereof are discussed. The organic light emitting display device according to an example includes a plurality of first bank layers arranged along a first direction and a second direction on a substrate to define a plurality of pixels; a plurality of second bank layers disposed along the first direction on the first bank layers to divide the columns of pixels having different colors; an organic light emitting layer in each pixel; at least one first pocket pixel unit at both sides of the pixel having the smallest area; and a first dummy organic light emitting layer in the first pocket pixel unit.

Abstract: A control signal generator to generate control signals for a readout integrated circuit (ROIC) includes a content addressable memory (CAM) and a random access memory (RAM). The CAM may have data stored within it that is indicative of times at which control signal switching events are to occur during generation of the control signals. The RAM may have data stored within it that is indicative of particular control signals that are to be toggled at the times indicated within the CAM.

Abstract: A control signal generator to generate control signals for a readout integrated circuit (ROIC) includes a content addressable memory (CAM) and a random access memory (RAM). The CAM may have data stored within it that is indicative of times at which control signal switching events are to occur during generation of the control signals. The RAM may have data stored within it that is indicative of particular control signals that are to be toggled at the times indicated within the CAM.

Abstract: According to one embodiment, a high speed serializer for multiplexing 2N data inputs, N being a positive integer, comprises one less than 2N multiplexing cells arranged in N stages. The stages are numbered 1 through N, and the output of the Nth stage is a serial transmission and the inputs of the 1st stage are the 2N data inputs. Each stage comprises half as many multiplexing cells as the preceding stage. Additionally, each multiplexing cell comprises a multiplexer that comprises a pair of inputs and an output. 2N-2 of the multiplexing cells in the first stage further comprise a latch, and the output of the latch is coupled to an input of the multiplexer.

Abstract: Methods and systems for digitally decoding integrated circuit blocks are provided. A method for decoding integrated circuit blocks may include providing a previous block output and an increment value input to a first identification block of a first integrated circuit block, providing the output of the first identification t block and the increment value input to one of a plurality of intermediate identification blocks, and providing an output of the last of the plurality of intermediate identification blocks and the increment value input to a last identification block, wherein the output of the last identification block is indicative of the number of integrated circuit blocks.

Abstract: According to one embodiment, a high speed serializer for multiplexing 2N data inputs, N being a positive integer, comprises one less than 2N multiplexing cells arranged in N stages. The stages are numbered 1 through N, and the output of the Nth stage is a serial transmission and the inputs of the 1st stage are the 2N data inputs. Each stage comprises half as many multiplexing cells as the preceding stage. Additionally, each multiplexing cell comprises a multiplexer that comprises a pair of inputs and an output. 2N-2 of the multiplexing cells in the first stage further comprise a latch, and the output of the latch is coupled to an input of the multiplexer.