Abstract: An apparatus for processing a photonic qubit signal includes a first optical unit to receive and transmit a time-modulated signal divided into two sections distinguished with respect to time and correspond to |0 and |1 states of single-photon qubit information; a second optical unit to form a first path-signal pattern by distributing the time-modulated signal into two spatial paths; a third optical unit to form a second path-signal pattern from the first path-signal pattern by inducing a relative delay and controlling a phase difference between signals on the two spatial paths; a fourth optical unit to form a third path-signal pattern through optical interference of the second path-signal pattern; and a fifth optical unit to control a phase difference between signals on the two spatial paths and form a fourth path-signal pattern through optical interference of the third path-signal pattern.

Abstract: Disclosed herein is a display apparatus that reduces a magnitude of a tension applied to a flexible PCB when a display panel is provided with a curved surface, and prevents damage of a driving chip. The display apparatus in accordance with exemplary embodiments includes a display panel configured to display an image, a source printed circuit board configured to control the display panel, and a flexible PCB that connects the display panel and the source printed circuit board. A length of at least one side edge of the flexible PCB is formed longer than a minimum length from the display panel to the source printed circuit board.

Abstract: Disclosed herein is a display apparatus that reduces a magnitude of a tension applied to a flexible PCB when a display panel is provided with a curved surface, and prevents damage of a driving chip. The display apparatus in accordance with exemplary embodiments includes a display panel configured to display an image, a source printed circuit board configured to control the display panel, and a flexible PCB that connects the display panel and the source printed circuit board. A length of at least one side edge of the flexible PCB is formed longer than a minimum length from the display panel to the source printed circuit board.

Abstract: A display device and manufacturing method thereof. The display device includes a first substrate and a second substrate formed to face each other; a liquid crystal layer between the first and second substrates; a plurality of gate wirings and data wirings intersecting each other to form a plurality of pixel regions on the second substrate; and a first ground wiring formed on the first substrate configured to block a surge voltage from being applied to the pixel regions.

Abstract: A handoff system and method between different kinds of devices, an SIP server and an application method of the SIP server applied thereto. The handoff system between different kinds of devices includes a plurality of devices; a SIP server which requests a routing path update when a handoff request signal is input from a source device among the plurality devices, and getting a target device to participate in a current session; and a gateway which updates a predetermined routing path when a request signal for the routing path update is input, and transmitting data to the source device and the target device via the updated routing path.

Abstract: A test apparatus includes one handler connected to a tester and one test board divided into two or more sites or two or more test boards. Since only the sites on the test board (or test boards) need be duplicated, rather than the loading lanes or sorters of the handler, the test apparatus can be conveniently compact. Further, while testing semiconductor devices on one site or one test board, semiconductor devices in another site or on another test board can be sorted according to the test result. This enables the reduction or elimination of tester idle time to optimize the efficiency of the test apparatus.

Abstract: A device and method of manufacturing a fuse region are disclosed. The fuse region may include an interlayer insulating layer formed on a substrate, a plurality of fuses disposed on the interlayer insulating layer, and fuse isolation walls located between the fuses, wherein each of the fuse isolation walls may include lower and upper fuse isolation patterns.

Abstract: In one embodiment, a connector is made using a mixture of insulating silicone powder and conductive powder. The connector comprises a connector body formed from the insulating silicone powder and on or more preferably regularly arrayed conductive silicone members that are formed by migrating the conductive powder to a site of the connector corresponding to a solder ball of the semiconductor package. The conductive silicone member comprises a high-density conductive silicone part formed to be proximate an upper surface of the connector body and to protrude therefrom and a low-density conductive silicone part formed in substantial vertical alignment beneath the high-density conductive silicone part, the low-density conductive silicone part having a lower surface exposed from a lower surface of the connector body.

Abstract: A test apparatus includes one handler connected to a tester and one test board divided into two or more sites or two or more test boards. Since only the sites on the test board (or test boards) need be duplicated, rather than the loading lanes or sorters of the handler, the test apparatus can be conveniently compact. Further, while testing semiconductor devices on one site or one test board, semiconductor devices in another site or on another test board can be sorted according to the test result. This enables the reduction or elimination of tester idle time to optimize the efficiency of the test apparatus.

Abstract: A test system of a semiconductor device for a handler remote control is provided. The system includes: a tester for testing the semiconductor device; a handler connected to the tester through a GPIB (General Purpose Instruction Bus) communication cable; a tester server connected to the tester to download a test program, handler remote control program and a handler state check program to the tester; and communication data transmitted and received through the GPIB communication cable between the tester and the handler, wherein the communication data has basic communication data for an electrical test of the semiconductor device, communication data for the handler remote control, and communication data for a handler state check.

Abstract: A test apparatus includes one handler connected to a tester and one test board divided into two or more sites or two or more test boards. Since only the sites on the test board (or test boards) need be duplicated, rather than the loading lanes or sorters of the handler, the test apparatus can be conveniently compact. Further, while testing semiconductor devices on one site or one test board, semiconductor devices in another site or on another test board can be sorted according to the test result. This enables the reduction or elimination of tester idle time to optimize the efficiency of the test apparatus.

Abstract: A test apparatus for testing a multi-chip package comprising a multiplicity of semiconductor chips, which includes a test driver having one drive channel and at least one input/output channel. A test board is mounted with the multi-chip package. Drive pins of the semiconductor chips are parallel connected to the drive channel, and input/output pins of the semiconductor chips are parallel connected to the input/output channel.

Abstract: A test system of a semiconductor device for a handler remote control is provided. The system includes: a tester for testing the semiconductor device; a handler connected to the tester through a GPIB (General Purpose Instruction Bus) communication cable; a tester server connected to the tester to download a test program, handler remote control program and a handler state check program to the tester; and communication data transmitted and received through the GPIB communication cable between the tester and the handler, wherein the communication data has basic communication data for an electrical test of the semiconductor device, communication data for the handler remote control, and communication data for a handler state check.

Abstract: A flash memory test system capable of test time reduction and an electrical test method using the same: The invention provides a parallel tester that includes a first memory and a second memory. The first and second memories are used to each supply different data to identical addresses within a plurality of DUTs, thereby making it possible to conduct in parallel tests such as trim tests, repair tests, and invalid block masking test. Thus parallel testing is done to replace testing that was previously done serially.

Abstract: A test system of a semiconductor device for a handler remote control is provided. The system includes: a tester for testing the semiconductor device; a handler connected to the tester through a GPIB (General Purpose Instruction Bus) communication cable; a tester server connected to the tester to download a test program, handler remote control program and a handler state check program to the tester; and communication data transmitted and received through the GPIB communication cable between the tester and the handler, wherein the communication data has basic communication data for an electrical test of the semiconductor device, communication data for the handler remote control, and communication data for a handler state check.

Abstract: Embodiments of the invention connect a plurality of devices under test (DUTS) in a parallel manner and a high test current is selectively applied to each DUT. The apparatus to test a plurality of DUTs includes a plurality of power sources providing the test current to a plurality of DUTs; and switching devices connected to the respective DUTs and power sources and selectively providing the test current. In addition, the apparatus has at least one control unit to control the switching devices. Furthermore, a group of DUTs from the plurality of DUTs is connected between two of the plurality of power sources in a parallel manner, and the test current is selectively provided to one DUT from the group of DUTs according to the operation of the switching devices.

Abstract: A test kit for a semiconductor package and a method of testing a semiconductor package using the same are provided. The test kit may include a pick-and-place tool for loading/unloading a semiconductor package, a head assembly for guiding a semiconductor package released from the pick-and-place tool, and a socket for receiving the semiconductor package from the pick-and-place tool. The method may include performing pre-alignment by inserting one or more slide posts of an alignment tool into a socket, releasing a semiconductor package through a package guider, and attaching the semiconductor package onto a socket.

Abstract: A handoff system and method between different kinds of devices, an SIP server and an application method of the SIP server applied thereto. The handoff system between different kinds of devices includes a plurality of devices; a SIP server which requests a routing path update when a handoff request signal is input from a source device among the plurality devices, and getting a target device to participate in a current session; and a gateway which updates a predetermined routing path when a request signal for the routing path update is input, and transmitting data to the source device and the target device via the updated routing path.

Abstract: A forced air heat exhaust type of burn-in test apparatus for packages: A first air supply duct provides air to the burn-in chamber and a second air supply duct provides air to supply tubes that direst air into the test sockets that hold the packages. The test sockets have a structure that allows air ventilation of the conductive balls. Accordingly, the apparatus can control the temperature around the packages as well as the temperature in the burn-in chamber, thus preventing conductive ball-melting.

Abstract: A test system of a semiconductor device for a handler remote control is provided. The system includes: a tester for testing the semiconductor device; a handler connected to the tester through a GPIB (General Purpose Instruction Bus) communication cable; a tester server connected to the tester to download a test program, handler remote control program and a handler state check program to the tester; and communication data transmitted and received through the GPIB communication cable between the tester and the handler, wherein the communication data has basic communication data for an electrical test of the semiconductor device, communication data for the handler remote control, and communication data for a handler state check.