Abstract: A power amplifier device includes a bias circuit to generate a startup current, which is based on an internal voltage and a startup voltage, during a startup time prior to a steady driving time point, and to generate a bias current, which is based on the internal voltage, after the steady driving time point, and a startup circuit to supply the bias circuit with the startup voltage during the startup time.

Abstract: The present invention provides a cation-exchange composite membrane comprising a copolymer containing a styrene repeating unit introduced with a sulfonation group, a tert-butylstyrene repeating unit and a crosslink repeating unit, an olefin additive, a plasticizer and a polyvinyl halide polymer. The cation-exchange composite membrane comprising a copolymer containing a styrene repeating unit introduced with a sulfonation group, a tert-butylstyrene repeating unit and a crosslink repeating unit, an olefin additive, a plasticizer and a polyvinyl halide polymer of the present invention not only displays low electrical resistance, excellent ion exchange capability, excellent ionic conductivity, excellent mechanical properties, excellent chemical properties, and processability, but also is easy to regulate its ion exchange ability and ionic conductivity. Also, the composite membrane of the invention is easier to produce and cheaper to manufacture than the conventional cation-exchange composite membrane.

Abstract: A radio frequency switch includes a control buffer circuit to generate a first gate voltage and a first body voltage; and a switching circuit to switch at least one signal path in response to the first gate voltage and the first body voltage. The control buffer circuit includes an off voltage detection circuit to detect whether the off voltage is a negative voltage or a ground voltage and output a voltage detection signal, a first gate buffer circuit to output a first gate voltage having a voltage level based on the voltage detection signal and the band selection signal, and a first body buffer circuit to output a first body voltage having a voltage level based on the voltage detection signal, the band selection signal, and the mode signal.

Abstract: A radio frequency switching device includes: a first series switching circuit connected between a first terminal and a second terminal; a first shunt switching circuit connected between one end of the first series switching circuit and a ground; a voltage generation circuit configured to generate a first gate voltage to be output to the first series switching circuit, to generate a second gate voltage to be output to the first shunt switching circuit, and to generate a bias voltage higher than the second gate voltage to control the first shunt switching circuit to enter an off state; a first resistance circuit connected between a signal line between the first terminal and the second terminal, and a bias voltage terminal of the voltage generation circuit; and a second resistance circuit connected between the bias voltage terminal of the voltage generation circuit and a ground terminal of the first shunt switching circuit.

Abstract: A radio frequency switching device includes a switching circuit including first and second transistors; a gate resistor circuit including a first gate resistor and a second gate resistor, the first gate resistor connected to a gate of the first transistor and the second gate resistor connected to a gate of the second transistor; a gate buffer circuit including a first gate buffer and a second gate buffer, the first gate buffer being connected to the first gate resistor to provide a first gate signal to the first transistor through the first gate resistor, the second gate buffer being connected to the second gate resistor to provide a second gate signal to the second transistor through the second gate resistor; and a delay circuit to generate the first gate signal having a first switching time and the second gate signal having a second switching time different than the first switching time.

Abstract: An envelope tracking (ET) bias circuit includes a detection circuit configured to select an ET operation voltage input through a first input terminal of the detection circuit, or an envelope signal detected from a radio frequency (RF) signal input through a second input terminal of the detection circuit, in response to a first control signal, to and output he selected one of the ET operation voltage and the envelope signal as a detection signal; an amplification circuit configured to amplify the detection signal, and output the amplified detection signal; and a bias output circuit configured to generate an ET bias current based on the amplified signal, and output the generated ET bias current.

Abstract: An apparatus for determining an optimum stacking number of an RF switch, in which a gate-off voltage and a body-off voltage are used to control transistors stacked in series to enter an OFF state. The apparatus includes a memory configured to store a peak voltage of a high-frequency signal in a corresponding band, and a gate limiting voltage, a drain-source limiting voltage, and a body limiting voltage in a corresponding process for each of the transistors, and a processor configured to calculate a gate terminal voltage, a drain-source voltage, and a body terminal voltage using the peak voltage, the gate limiting voltage, the drain-source limiting voltage, and the body limiting voltage and to determine an optimum stacking number based on the gate terminal voltage, the gate limiting voltage, the drain-source voltage, the drain-source limiting voltage, the body terminal voltage, and the body limiting voltage.

Abstract: An envelope tracking (ET) current bias circuit includes a rectifying circuit, a phase compensation circuit, and a voltage/current conversion circuit. The rectifying circuit is configured to detect an envelope voltage from a radio frequency (RF) signal. The phase compensation circuit is configured to compensate for a phase of the envelope voltage in which the phase thereof is delayed in the rectifying circuit to output a phase compensated enveloped voltage. The voltage/current conversion circuit is configured to convert the phase compensated envelope voltage into an ET bias current.

Abstract: An envelope tracking (ET) bias circuit includes an envelope tracking (ET) bias circuit includes an envelope detection circuit, an envelope amplifier circuit, and an envelope output circuit. The envelope detection circuit is configured to detect an envelope of an input signal, and output an envelope signal based on the detected envelope of the input signal. The envelope amplifier circuit is configured to differentially amplify the envelope signal in response to a first control signal and cancel a direct current (DC) offset of the envelope signal to output an amplified signal from which the DC offset is canceled. The envelope output circuit is configured to generate an ET bias current by selecting either one of a negative signal of the amplified signal and a positive signal of the amplified signal in response to a second control signal.

Abstract: A control buffer circuit includes a voltage detection circuit configured to detect whether a received voltage is a negative voltage or a ground voltage and provide a voltage detection signal based on a result of the detecting, and a buffer circuit configured to provide a switching signal based on the voltage detection signal, wherein the switching signal comprises a positive voltage as a switching-on level voltage and includes one or more of the ground voltage and the negative voltage as a switching-off level voltage.

Abstract: A separation membrane for olefin separation and olefin separation method using the same are provided.

Abstract: A reference current generating circuit includes a current source circuit configured to generate a reference current based on an internal resistor; and a compensation circuit configured to comprise a first compensation circuit comprising a first compensation resistor and a second compensation resistor, and the first compensation resistor and the second compensation resistor are configured to convert the reference current into a first output current and compensate for process variation of the current source circuit.

Abstract: An apparatus for determining an optimum stacking number of an RF switch, in which a gate-off voltage and a body-off voltage are used to control transistors stacked in series to enter an OFF state. The apparatus includes a memory configured to store a peak voltage of a high-frequency signal in a corresponding band, and a gate limiting voltage, a drain-source limiting voltage, and a body limiting voltage in a corresponding process for each of the transistors, and a processor configured to calculate a gate terminal voltage, a drain-source voltage, and a body terminal voltage using the peak voltage, the gate limiting voltage, the drain-source limiting voltage, and the body limiting voltage and to determine an optimum stacking number based on the gate terminal voltage, the gate limiting voltage, the drain-source voltage, the drain-source limiting voltage, the body terminal voltage, and the body limiting voltage.

Abstract: A power amplifier apparatus, includes an envelope tracking (ET) current bias circuit configured to generate a first ET bias current by calculating a direct current DC, based on a reference voltage, and an ET current, based on an ET voltage, according to an envelope of an input signal; and a power amplifier circuit having a bipolar junction transistor supplied with the first ET bias current and a power voltage to amplify the input signal, wherein an average current of the first ET bias current is controlled to be substantially constant.

Abstract: A power amplifying apparatus includes a power circuit configured to generate operating power, a random pulse generation circuit configured to be supplied with the operating power and to generate a pulse width modulation signal of which a pulse width is randomly changed over time using an input radio frequency (RF) signal, and a charge pump circuit configured to be supplied with the operating power and to randomly perform a switching operation according to the pulse width modulation signal to generate a negative voltage.

Abstract: An envelope-tracking current bias circuit includes a first rectifying circuit, a second rectifying circuit, and a first arithmetic circuit. The first rectifying circuit is configured to detect an envelope of an input signal, and provide an envelope detection signal comprising a first direct current (DC) offset voltage. The second rectifying circuit is configured to provide a second DC offset voltage corresponding to the first DC offset voltage. The first arithmetic circuit is configured to provide an envelope signal in which the first DC offset voltage is reduced through subtraction between the envelope detection signal and the second DC offset voltage.

Abstract: A radio frequency switching device includes a switching circuit including first and second transistors; a gate resistor circuit including a first gate resistor and a second gate resistor, the first gate resistor connected to a gate of the first transistor and the second gate resistor connected to a gate of the second transistor; a gate buffer circuit including a first gate buffer and a second gate buffer, the first gate buffer being connected to the first gate resistor to provide a first gate signal to the first transistor through the first gate resistor, the second gate buffer being connected to the second gate resistor to provide a second gate signal to the second transistor through the second gate resistor; and a delay circuit to generate the first gate signal having a first switching time and the second gate signal having a second switching time different than the first switching time.

Abstract: A power amplifier apparatus, includes an envelope tracking (ET) current bias circuit configured to generate a first ET bias current by calculating a direct current DC, based on a reference voltage, and an ET current, based on an ET voltage, according to an envelope of an input signal; and a power amplifier circuit having a bipolar junction transistor supplied with the first ET bias current and a power voltage to amplify the input signal, wherein an average current of the first ET bias current is controlled to be substantially constant.

Abstract: A control buffer circuit includes a voltage detection circuit configured to detect whether a received voltage is a negative voltage or a ground voltage and provide a voltage detection signal based on a result of the detecting, and a buffer circuit configured to provide a switching signal based on the voltage detection signal, wherein the switching signal comprises a positive voltage as a switching-on level voltage and includes one or more of the ground voltage and the negative voltage as a switching-off level voltage.

Abstract: A radio frequency switching circuit includes a switching circuit comprising a plurality of switching transistors connected between a first terminal and a second terminal, a gate resistor circuit comprising a plurality of gate resistors, each of the plurality of gate resistors having a first node connected to a respective gate of each of the plurality of switching transistors, and a gate buffer circuit comprising a plurality of gate buffers, each of the plurality of gate buffers being connected to a respective second node of each of the plurality of gate resistors, wherein each of the plurality the gate buffers is configured to provide a first gate signal to the gate of each of the plurality of switching transistors through each of the plurality of gate resistors.