Patents by Inventor JEONGHUN CHO

JEONGHUN CHO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11682610
    Abstract: A semiconductor package includes a terminal pad having at least one first terminal lead structurally connected to the terminal pad, a semiconductor chip attached to an upper surface of the terminal pad by using a first adhesive, a heat radiation board attached to a lower surface of the terminal pad by using a second adhesive, and at least one second terminal lead electrically connected to the semiconductor chip. The second terminal lead is spaced apart from the terminal pad and is separated from the radiation board. The package further includes a metal clip electrically connecting the semiconductor chip to the second terminal lead, and a package housing covering parts of the first terminal lead, the second terminal lead, and the terminal pad. The package housing includes an adhesive spread space to expose the lower surface of the terminal pad.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: June 20, 2023
    Assignee: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa Choi, Younghun Kim, Jeonghun Cho
  • Patent number: 11676931
    Abstract: A semiconductor package according to an embodiment of the present invention Includes: a lead frame comprising a pad and a lead spaced apart from the pad by a regular interval; a semiconductor chip adhered on the pad; and a clip structure electrically connecting the semiconductor chip and the lead, wherein an one end of the clip structure connected to the semiconductor chip inclines with respect to upper surfaces of chip pads of the semiconductor chip and is adhered to the upper surfaces of the chip pads of the semiconductor chip. A semiconductor package according to another embodiment of the present invention includes: a semiconductor chip comprising one or more chip pads; one or more leads electrically connected to the chip pads; and a sealing member covering the semiconductor chip, wherein an one end of the lead inclines with respect to one surface of the chip pad and is adhered to the chip pad and an other end of the lead is exposed to the outside of the sealing member.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: June 13, 2023
    Assignee: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa Choi, Jeonghun Cho, Young Hun Kim, Taeheon Lee
  • Patent number: 11482463
    Abstract: Provided is a semiconductor package modularized and manufactured by preparing a main block for putting on a semiconductor chip, an insulator, and one or more sub block, preparing the semiconductor chip, preparing an adhesive used in attaching the semiconductor chip, attaching the semiconductor chip to an upper surface or upper and lower surfaces of the main block, performing an electrical connection of the semiconductor chip, preparing a substrate comprising a pattern enabling an electrical connection and vertically attaching one side of the main block to the pattern of the substrate to enable an electrical connection. In the semiconductor package above, an accumulation rate increases on the substrate due to a vertically arranged structure of the semiconductor chips and a heat emission area is enlarged to improve a heat emission effect.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: October 25, 2022
    Assignee: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa Choi, Jeonghun Cho
  • Patent number: 11362021
    Abstract: Provided is a pressurized semiconductor package including a lead frame including a pad board and a first terminal, a semiconductor chip, pressurizing members stacked to pressurize the semiconductor chip, and a package housing. The semiconductor chip is physically pressurized by the pressurizing members and is electrically connected to improve durability of the semiconductor package and to simplify a manufacturing process.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: June 14, 2022
    Assignee: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa Choi, Jeonghun Cho
  • Publication number: 20220148998
    Abstract: A semiconductor package according to an embodiment of the present invention Includes: a lead frame comprising a pad and a lead spaced apart from the pad by a regular interval; a semiconductor chip adhered on the pad; and a clip structure electrically connecting the semiconductor chip and the lead, wherein an one end of the clip structure connected to the semiconductor chip inclines with respect to upper surfaces of chip pads of the semiconductor chip and is adhered to the upper surfaces of the chip pads of the semiconductor chip. A semiconductor package according to another embodiment of the present invention includes: a semiconductor chip comprising one or more chip pads; one or more leads electrically connected to the chip pads; and a sealing member covering the semiconductor chip, wherein an one end of the lead inclines with respect to one surface of the chip pad and is adhered to the chip pad and an other end of the lead is exposed to the outside of the sealing member.
    Type: Application
    Filed: January 20, 2022
    Publication date: May 12, 2022
    Applicant: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa CHOI, Jeonghun CHO, Young Hun KIM, Taeheon LEE
  • Patent number: 11289397
    Abstract: A semiconductor package according to an embodiment of the present invention includes: a heat sink board including an insulated board and a first metal layer formed on the insulated board; at least one semiconductor chip placed on the first metal layer; a plurality of lead frames connected to the semiconductor chips used to electrically connect the semiconductor chips to the outside; and a package housing partially covering the heat sink board, wherein both end parts of the insulated board are projected further than both end parts of the first metal layer.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: March 29, 2022
    Assignee: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa Choi, Young Hun Kim, Jeonghun Cho, So Young Choi
  • Patent number: 11270969
    Abstract: A semiconductor package according to an embodiment of the present invention Includes: a lead frame comprising a pad and a lead spaced apart from the pad by a regular interval; a semiconductor chip adhered on the pad; and a clip structure electrically connecting the semiconductor chip and the lead, wherein an one end of the clip structure connected to the semiconductor chip inclines with respect to upper surfaces of chip pads of the semiconductor chip and is adhered to the upper surfaces of the chip pads of the semiconductor chip. A semiconductor package according to another embodiment of the present invention includes: a semiconductor chip comprising one or more chip pads; one or more leads electrically connected to the chip pads; and a sealing member covering the semiconductor chip, wherein an one end of the lead inclines with respect to one surface of the chip pad and is adhered to the chip pad and an other end of the lead is exposed to the outside of the sealing member.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: March 8, 2022
    Assignee: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa Choi, Jeonghun Cho, Young Hun Kim, Taeheon Lee
  • Patent number: 11171074
    Abstract: A heat sink board according to an embodiment of the present invention includes a heat sink layer, an insulated layer formed on the heat sink layer, and a metal layer formed on the insulated layer, wherein both end parts of the heat sink layer and both end parts of the insulated layer are respectively projected further than the both end parts of the metal layer.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: November 9, 2021
    Assignee: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa Choi, Jeonghun Cho
  • Publication number: 20210280501
    Abstract: Provided is a pressurized semiconductor package including a lead frame including a pad board and a first terminal, a semiconductor chip, pressurizing members stacked to pressurize the semiconductor chip, and a package housing. The semiconductor chip is physically pressurized by the pressurizing members and is electrically connected to improve durability of the semiconductor package and to simplify a manufacturing process.
    Type: Application
    Filed: October 12, 2020
    Publication date: September 9, 2021
    Applicant: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa CHOI, Jeonghun CHO
  • Publication number: 20210249342
    Abstract: The present invention provides a semiconductor package including: a lead frame comprising at least one terminal pad and at least one first terminal lead structurally connected to the terminal pads; at least one semiconductor chip attached to the upper surfaces of the terminal pads by using a conductive first adhesive; at least one heat radiation board attached to the lower surfaces of the terminal pads by using a second adhesive; at least one second terminal lead electrically connected to the semiconductor chips, spaced apart from the terminal pads at regular intervals, and separated from the heat radiation boards; and a package housing covering parts of the first and second terminal leads, the semiconductor chips, and the terminal pads.
    Type: Application
    Filed: November 27, 2020
    Publication date: August 12, 2021
    Applicant: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa CHOI, Younghun KIM, Jeonghun CHO
  • Patent number: 11056420
    Abstract: The present invention relates generally to a pressing-type semiconductor power device package, and more specifically to a pressing-type semiconductor power device package in which a semiconductor chip, such as a transistor or diode, is formed into a package via a pressing structure without using any conductive adhesive, such as solder, which is used in the past, thereby improving production efficiency and durability.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: July 6, 2021
    Assignee: JMJ KOREA CO., LTD.
    Inventors: Yunhwa Choi, Jeonghun Cho, Jungtae Cho
  • Publication number: 20210143076
    Abstract: A semiconductor package according to an embodiment of the present invention includes: a heat sink board including an insulated board and a first metal layer formed on the insulated board; at least one semiconductor chip placed on the first metal layer; a plurality of lead frames connected to the semiconductor chips used to electrically connect the semiconductor chips to the outside; and a package housing partially covering the heat sink board, wherein both end parts of the insulated board are projected further than both end parts of the first metal layer.
    Type: Application
    Filed: August 18, 2020
    Publication date: May 13, 2021
    Applicant: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa CHOI, Young Hun KIM, Jeonghun CHO, So Young CHOI
  • Publication number: 20210118768
    Abstract: A heat sink board according to an embodiment of the present invention includes a heat sink layer, an insulated layer formed on the heat sink layer, and a metal layer formed on the insulated layer, wherein both end parts of the heat sink layer and both end parts of the insulated layer are respectively projected further than the both end parts of the metal layer.
    Type: Application
    Filed: July 8, 2020
    Publication date: April 22, 2021
    Applicant: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa CHOI, Jeonghun CHO
  • Publication number: 20200395264
    Abstract: Provided is a semiconductor package modularized and manufactured by preparing a main block for putting on a semiconductor chip, an insulator, and one or more sub block, preparing the semiconductor chip, preparing an adhesive used in attaching the semiconductor chip, attaching the semiconductor chip to an upper surface or upper and lower surfaces of the main block, performing an electrical connection of the semiconductor chip, preparing a substrate comprising a pattern enabling an electrical connection and vertically attaching one side of the main block to the pattern of the substrate to enable an electrical connection. In the semiconductor package above, an accumulation rate increases on the substrate due to a vertically arranged structure of the semiconductor chips and a heat emission area is enlarged to improve a heat emission effect.
    Type: Application
    Filed: May 20, 2020
    Publication date: December 17, 2020
    Applicant: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa CHOI, Jeonghun CHO
  • Publication number: 20200388588
    Abstract: A semiconductor package according to an embodiment of the present invention Includes: a lead frame comprising a pad and a lead spaced apart from the pad by a regular interval; a semiconductor chip adhered on the pad; and a clip structure electrically connecting the semiconductor chip and the lead, wherein an one end of the clip structure connected to the semiconductor chip inclines with respect to upper surfaces of chip pads of the semiconductor chip and is adhered to the upper surfaces of the chip pads of the semiconductor chip. A semiconductor package according to another embodiment of the present invention includes: a semiconductor chip comprising one or more chip pads; one or more leads electrically connected to the chip pads; and a sealing member covering the semiconductor chip, wherein an one end of the lead inclines with respect to one surface of the chip pad and is adhered to the chip pad and an other end of the lead is exposed to the outside of the sealing member.
    Type: Application
    Filed: April 14, 2020
    Publication date: December 10, 2020
    Applicant: JMJ Korea Co., Ltd.
    Inventors: Yun Hwa CHOI, Jeonghun CHO, Young Hun KIM, Taeheon LEE
  • Patent number: 10438873
    Abstract: Disclosed herein is a semiconductor chip package having a heat dissipating structure. The semiconductor chip package including: a semiconductor chip configured such that a plurality of terminals protrudes from the upper surface thereof; lead frames connected to the terminals located on the upper surface of the semiconductor chip; and a package body configured to protect the semiconductor chip and the lead frames and to form the outside shape of the semiconductor chip package, and formed by molding. The lower surfaces of the lead frames are exposed to the outside. The lower surface of the package body is partially cut out such that the bottom surface of the semiconductor chip is exposed to the outside.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: October 8, 2019
    Assignee: JMJ KOREA CO., LTD.
    Inventors: Yunhwa Choi, Jeonghun Cho
  • Publication number: 20190259686
    Abstract: The present invention relates generally to a pressing-type semiconductor power device package, and more specifically to a pressing-type semiconductor power device package in which a semiconductor chip, such as a transistor or diode, is formed into a package via a pressing structure without using any conductive adhesive, such as solder, which is used in the past, thereby improving production efficiency and durability.
    Type: Application
    Filed: December 20, 2018
    Publication date: August 22, 2019
    Inventors: Yunhwa CHOI, Jeonghun CHO, Jungtae CHO
  • Patent number: 10204848
    Abstract: Disclosed herein is a semiconductor chip package having a heat dissipating structure. The semiconductor chip package including: a semiconductor chip configured such that a plurality of terminals protrudes from the upper surface thereof; lead frames connected to the terminals located on the upper surface of the semiconductor chip; and a package body configured to protect the semiconductor chip and the lead frames and to form the outside shape of the semiconductor chip package, and formed by molding. The lower surfaces of the lead frames are exposed to the outside. The lower surface of the package body is partially cut out such that the bottom surface of the semiconductor chip is exposed to the outside.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: February 12, 2019
    Assignee: JMJ KOREA CO., LTD.
    Inventors: Yunhwa Choi, Jeonghun Cho
  • Publication number: 20180233439
    Abstract: Disclosed herein is a semiconductor chip package having a heat dissipating structure. The semiconductor chip package including: a semiconductor chip configured such that a plurality of terminals protrudes from the upper surface thereof; lead frames connected to the terminals located on the upper surface of the semiconductor chip; and a package body configured to protect the semiconductor chip and the lead frames and to form the outside shape of the semiconductor chip package, and formed by molding. The lower surfaces of the lead frames are exposed to the outside. The lower surface of the package body is partially cut out such that the bottom surface of the semiconductor chip is exposed to the outside.
    Type: Application
    Filed: April 9, 2018
    Publication date: August 16, 2018
    Inventors: Yunhwa Choi, Jeonghun Cho
  • Publication number: 20180040541
    Abstract: Disclosed herein is a semiconductor chip package having a heat dissipating structure. The semiconductor chip package including: a semiconductor chip configured such that a plurality of terminals protrudes from the upper surface thereof; lead frames connected to the terminals located on the upper surface of the semiconductor chip; and a package body configured to protect the semiconductor chip and the lead frames and to form the outside shape of the semiconductor chip package, and formed by molding. The lower surfaces of the lead frames are exposed to the outside. The lower surface of the package body is partially cut out such that the bottom surface of the semiconductor chip is exposed to the outside.
    Type: Application
    Filed: June 8, 2017
    Publication date: February 8, 2018
    Inventors: YUNHWA CHOI, JEONGHUN CHO