Patents by Inventor Jeong Hun Rhee

Jeong Hun Rhee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10096686
    Abstract: Embodiments of the present disclosure disclose a thin film transistor, a fabrication method thereof, a repair method thereof, and an array substrate. The thin film transistor comprises a gate electrode (12), a gate insulating layer (13), an active layer (14), a source electrode (16) and a drain electrode (17). The source electrode (16) comprises a first source electrode portion (161) and a second source electrode portion (162) independent from each other, the first source electrode portion (161) and the second source electrode portion (162) are electrically connected with the active layer (14), respectively; and/or, the drain electrode (17) comprises a first drain electrode portion (171) and a second drain electrode portion (172) independent from each other, the first drain electrode portion (171) and the second drain electrode portion (172) are electrically connected with the active layer (14), respectively.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: October 9, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Kiyong Kim, Liping Luo, Chaoqin Xu, Jeong Hun Rhee
  • Patent number: 10090338
    Abstract: Disclosed is a method for manufacturing an array substrate, the array substrate and a display device which can reduce manufacturing steps of a color filter process and further reduce manufacturing steps of the display device, thereby saving manufacturing cost and time. The method for manufacturing the array substrate includes: forming a thin film transistor on a base substrate; forming a passivation layer having a via hole on a front side of the thin film transistor and forming a photo spacer on a front side of the passivation layer through a halftone mask patterning process. With this method for manufacturing the array substrate, there is no need to prepare the photo spacer on a back side of the color filter substrate. Therefore, it is possible to reduce manufacturing steps of a color filter process, which in turn further reduces manufacturing steps of the display device, thereby saving manufacturing cost and time.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: October 2, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Shifei Shen, Jeong Hun Rhee, Youngjin Song, Maomao Fang, Jianxin Hou
  • Publication number: 20170263655
    Abstract: Disclosed is a method for manufacturing an array substrate, the array substrate and a display device which can reduce manufacturing steps of a color filter process and further reduce manufacturing steps of the display device, thereby saving manufacturing cost and time. The method for manufacturing the array substrate includes: forming a thin film transistor on a base substrate; forming a passivation layer having a via hole on a front side of the thin film transistor and forming a photo spacer on a front side of the passivation layer through a halftone mask patterning process. With this method for manufacturing the array substrate, there is no need to prepare the photo spacer on a back side of the color filter substrate. Therefore, it is possible to reduce manufacturing steps of a color filter process, which in turn further reduces manufacturing steps of the display device, thereby saving manufacturing cost and time.
    Type: Application
    Filed: August 4, 2016
    Publication date: September 14, 2017
    Inventors: Shifei Shen, Jeong Hun Rhee, Youngjin Song, Maomao Fang, Jianxin Hou
  • Patent number: 9523895
    Abstract: An embodiment of the invention relates to a TFT-LCD array substrate comprising a substrate, a gate line and a data line formed on the substrate, a pixel electrode and a thin film transistor formed in a pixel region defined by the gate line and the data line, wherein the thin film transistor comprises a gate electrode, a source electrode, and a transparent drain electrode, and the transparent drain electrode is electrically connected with the pixel electrode.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: December 20, 2016
    Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei Li, Jeong Hun Rhee
  • Publication number: 20160013281
    Abstract: Embodiments of the present disclosure disclose a thin film transistor, a fabrication method thereof, a repair method thereof, and an array substrate. The thin film transistor comprises a gate electrode (12), a gate insulating layer (13), an active layer (14), a source electrode (16) and a drain electrode (17). The source electrode (16) comprises a first source electrode portion (161) and a second source electrode portion (162) independent from each other, the first source electrode portion (161) and the second source electrode portion (162) are electrically connected with the active layer (14), respectively; and/or, the drain electrode (17) comprises a first drain electrode portion (171) and a second drain electrode portion (172) independent from each other, the first drain electrode portion (171) and the second drain electrode portion (172) are electrically connected with the active layer (14), respectively.
    Type: Application
    Filed: September 18, 2014
    Publication date: January 14, 2016
    Inventors: Kiyong KIM, Liping LUO, Chaoqin XU, Jeong Hun RHEE
  • Patent number: 9040994
    Abstract: A thin-film transistor (TFT) comprises a gate electrode, a gate insulating layer, a source electrode and a drain electrode which are formed on a base substrate, the source electrode and the drain electrode are disposed on different layers and isolated from each other through a semiconductor connecting section made of an oxide semiconductor material; a position of the semiconductor connecting section corresponds to a position of the gate electrode; and at least one part of the source electrode and at least one part of the drain electrode overlap each other at a position corresponding to the semiconductor connecting section. A display device comprising the TFT and a display device comprising the display device are also disclosed.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: May 26, 2015
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Jeong Hun Rhee, Lianhua Che
  • Publication number: 20140220747
    Abstract: An embodiment of the invention relates to a TFT-LCD array substrate comprising a substrate, a gate line and a data line formed on the substrate, a pixel electrode and a thin film transistor formed in a pixel region defined by the gate line and the data line, wherein the thin film transistor comprises a gate electrode, a source electrode, and a transparent drain electrode, and the transparent drain electrode is electrically connected with the pixel electrode.
    Type: Application
    Filed: April 14, 2014
    Publication date: August 7, 2014
    Applicants: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei LI, Jeong Hun RHEE
  • Patent number: 8735976
    Abstract: A Thin Film Transistor-Liquid Crystal Display (TFT-LCD) array substrate is presented which includes a gate line, a data line, and a pixel electrode. The pixel electrode is disposed in a pixel region defined by the intersection between the gate line and the data line. In the pixel region, a partition groove for forming a pixel electrode pattern is provided at the periphery of the pixel electrode.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: May 27, 2014
    Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.
    Inventors: Hongxi Xiao, Jae Yun Jung, Zuhong Liu, Taek Ho Hong, Jeong Hun Rhee
  • Patent number: 8735888
    Abstract: An embodiment of the invention relates to a TFT-LCD array substrate comprising a substrate, a gate line and a data line formed on the substrate, a pixel electrode and a thin film transistor formed in a pixel region defined by the gate line and the data line, wherein the thin film transistor comprises a gate electrode, a source electrode, and a transparent drain electrode, and the transparent drain electrode is electrically connected with the pixel electrode.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: May 27, 2014
    Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.
    Inventors: Wei Li, Jeong Hun Rhee
  • Publication number: 20140097437
    Abstract: A thin-film transistor (TFT) comprises a gate electrode, a gate insulating layer, a source electrode and a drain electrode which are formed on a base substrate, the source electrode and the drain electrode are disposed on different layers and isolated from each other through a semiconductor connecting section made of an oxide semiconductor material; a position of the semiconductor connecting section corresponds to a position of the gate electrode; and at least one part of the source electrode and at least one part of the drain electrode overlap each other at a position corresponding to the semiconductor connecting section. A display device comprising the TFT and a display device comprising the display device are also disclosed.
    Type: Application
    Filed: October 8, 2013
    Publication date: April 10, 2014
    Applicants: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jeong Hun RHEE, Lianhua CHE
  • Patent number: 8404507
    Abstract: A TFT-LCD array substrate and a manufacturing method thereof. The array substrate comprises a gate line, a data line, and a pixel electrode, and the pixel electrode is disposed in a pixel region defined by the intersection between the gate line and the data line. In the pixel region, a partition groove for forming a pixel electrode pattern is provided at the periphery of the pixel electrode. This structure is helpful to form a pixel electrode pattern by a lift-off process, which significantly reduces the production cost and improves the production yield.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: March 26, 2013
    Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.
    Inventors: Hongxi Xiao, Jae Yun Jung, Zuhong Liu, Taek Ho Hong, Jeong Hun Rhee
  • Patent number: 8298883
    Abstract: A method of forming a photoresist burr edge and a method of manufacturing an array substrate are provided in the present invention. The method of manufacturing an array substrate comprises: forming a gate line and a gate electrode on a substrate; forming a data line, a source electrode, a drain electrode and a TFT channel region without removing the photoresist on the data line, the source electrode and the drain electrode; depositing a passivation layer; removing the remained photoresist and the passivation layer thereon by a lifting-off process; applying a photoresist layer; forming a photoresist burr edge of peak shape; depositing a transparent conductive film; forming a pixel electrode by a lifting-off process, wherein the pixel electrode is directly connected with the drain electrode.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: October 30, 2012
    Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.
    Inventors: Yunyou Zheng, Jae Yun Jung, Zhi Hou, Zuhong Liu, Jeong Hun Rhee
  • Publication number: 20110068341
    Abstract: An embodiment of the invention relates to a TFT-LCD array substrate comprising a substrate, a gate line and a data line formed on the substrate, a pixel electrode and a thin film transistor formed in a pixel region defined by the gate line and the data line, wherein the thin film transistor comprises a gate electrode, a source electrode, and a transparent drain electrode, and the transparent drain electrode is electrically connected with the pixel electrode.
    Type: Application
    Filed: September 16, 2010
    Publication date: March 24, 2011
    Applicant: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Wei LI, Jeong Hun RHEE
  • Publication number: 20100012945
    Abstract: A method of forming a photoresist burr edge and a method of manufacturing an array substrate are provided in the present invention. The method of manufacturing an array substrate comprises: forming a gate line and a gate electrode on a substrate; forming a data line, a source electrode, a drain electrode and a TFT channel region without removing the photoresist on the data line, the source electrode and the drain electrode; depositing a passivation layer; removing the remained photoresist and the passivation layer thereon by a lifting-off process; applying a photoresist layer; forming a photoresist burr edge of peak shape; depositing a transparent conductive film; forming a pixel electrode by a lifting-off process, wherein the pixel electrode is directly connected with the drain electrode.
    Type: Application
    Filed: July 16, 2009
    Publication date: January 21, 2010
    Inventors: Yunyou ZHENG, Jae Yun JUNG, Zhi HOU, Zuhong LIU, Jeong Hun RHEE
  • Publication number: 20090321740
    Abstract: A TFT-LCD array substrate and a manufacturing method thereof. The array substrate comprises a gate line, a data line, and a pixel electrode, and the pixel electrode is disposed in a pixel region defined by the intersection between the gate line and the data line. In the pixel region, a partition groove for forming a pixel electrode pattern is provided at the periphery of the pixel electrode. This structure is helpful to form a pixel electrode pattern by a lift-off process, which significantly reduces the production cost and improves the production yield.
    Type: Application
    Filed: June 24, 2009
    Publication date: December 31, 2009
    Inventors: Hongxi XIAO, Jae Yun JUNG, Zuhong LIU, Taek Ho HONG, Jeong Hun RHEE
  • Patent number: 6140158
    Abstract: A method of manufacturing a TFT-LCD which can prevent damage due to a mask process and reduce cost by minimizing mask process number, is disclosed. A three-mask process is required for fabricating a TFT-LCD in the present invention. Firstly, on a transparent insulating substrate are formed a semiconductor layer, a doped semiconductor layer and a first metal layer, sequentially. The first metal layer is then etched using a first mask, to form source and drain electrodes spaced to a selected distance. Next, the doped semiconductor layer is etched using the source and drain electrodes as an etch mask, to form ohmic layers under the source and drain electrodes. A gate insulating layer and a second metal layer are then formed on the overall substrate, in sequence. Thereafter, the second metal layer is etched using a second mask, to form a gate electrode overlapped with the insides of the source and drain electrodes.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: October 31, 2000
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Jeong Hun Rhee, Seong Sil Im