Abstract: There is provided a storage apparatus for providing an effective memory addressing method. The storage apparatus includes at least one memory and at least one controller coupled to the at least one memory to provide address information. Each of the controllers includes a first controller for providing on/off information of subfields included in one frame for driving pixels in a display panel, a third controller for horizontal position information corresponding to a selected scan line from scan lines of a display panel, and a second controller for providing vertical position information corresponding to a pixel on the selected scan line. On/off information of subfields for at least two pixels is stored in a cell located at the vertical position and the horizontal position in the at least one memory.

Abstract: A display device includes a display unit, a scan driver unit, and a data driver. The display unit includes a plurality of pixels arranged in a matrix. The matrix includes a first pixel row block and a second pixel row block. The scan driver unit includes a first scan driver to sequentially transmit a first scan signal in each frame to the first pixel row block, and a second scan driver to sequentially transmit the first scan signal in each frame to the second pixel row block. The data driver inputs first frame image data for a first time to the display unit in an n-th frame and to input the first frame image data for a second time to the display unit in an (n+1)-th frame.

Abstract: A pixel includes a first transistor coupled between a first power source and a first node, the first transistor including a gate electrode coupled to a second node, an organic light emitting diode (OLED) coupled between the first node and a second power source, a second transistor for supplying a data signal to the second node in response to a scan signal, a third transistor having a source electrode and a drain electrode electrically coupled to each other, the third transistor being coupled to the first power source and the second node, and a fourth transistor having a source electrode and a drain electrode electrically coupled to each other, the fourth transistor being coupled between the second node and the first node.

Abstract: A semiconductor device includes a semiconductor layer on a substrate, a gate electrode electrically insulated from the semiconductor layer by a gate insulating layer, an insulating layer on the gate insulating layer and on the gate electrode, and a source electrode and a drain electrode on the insulating layer, the source and drain electrode being connected to the semiconductor layer. The source electrode overlaps at least a part of the gate electrode. The source electrode, the insulating layer, and the gate electrode overlap each other so as to provide a capacitor.

Abstract: A degradation compensation unit including a first operation unit receiving downscaled gray data of each pixel for one frame at set or predetermined intervals and calculating a degradation time of each pixel corresponding to the downscaled gray data; an accumulation operation unit receiving the degradation time of each pixel from the first operation unit and calculating an accumulated degradation time of each pixel by accumulating the degradation time of each pixel; a weight calculation unit receiving the accumulated degradation time of each pixel from the accumulation operation unit and calculating a degradation compensation weight for each pixel based on the accumulated degradation time of each pixel; and a second operation unit producing compensated gray data for each pixel corresponding to the degradation compensation weight for each pixel, which is received from the weight calculation unit, and providing the compensated gray data for each pixel to a data driver.

Abstract: An organic light emitting display including an image display unit including a plurality of data lines arranged in a first direction, a plurality of scan lines arranged in a second direction, and a plurality of pixels arranged at intersections of the data lines and the scan lines; a plurality of main power source lines and auxiliary power source lines arranged to intersect each other, the plurality of main power source lines and auxiliary power source lines transmitting a first power source as a pixel power source to the pixels; and auxiliary metal layers overlapping portions of the auxiliary power source lines in regions between adjacent pixels, the auxiliary metal layers having a lower resistance value than a resistance value of the auxiliary power source lines, wherein the auxiliary metal layers are electrically coupled with the auxiliary power source lines.

Abstract: An organic light emitting display device includes a substrate including a display area on which a plurality of pixels are formed and a non-display area surrounding the display area; a first power line positioned on a lower non-display area; an auxiliary power line positioned on an upper non-display area; a first power supply supplying a first voltage to the first power line; and an auxiliary power supply supplying an auxiliary voltage to the auxiliary power line. Accordingly, it is possible to provide an organic light emitting display device capable of equalizing luminance by minimizing a variation in power supplied to each pixel.

Abstract: A scan driving unit and OLED display device including the unit are disclosed. In one aspect, the unit includes a first pre-decoder block that receives upper scan-line selection signals for selecting one of upper scan-lines that are arranged in an upper display region of a display panel, and outputs first logic signals based on the upper scan-line selection signals. It also includes a second pre-decoder block that receives lower scan-line selection signals for selecting one of lower scan-lines that are arranged in a lower display region of the display panel, and outputs second logic signals based on the lower scan-line selection signals. It further includes a first final-decoder block coupled between the upper display region and the first pre-decoder block that selects one of the upper scan-lines based on the first logic signals, and a second final-decoder block coupled between the lower display region and the second pre-decoder block that selects one of the lower scan-lines based on the second logic signals.

Abstract: A stereoscopic image display device includes: a scan driver for transmitting scan signals to scan lines; a data driver for transmitting data signals to data lines; a display unit including pixels and configured to receive a corresponding data signal when a corresponding scan signal is transmitted to the pixels; a power supply controller for supplying a driving voltage to drive the pixels; and a controller for controlling the scan driver, the data driver, and the power supply controller, for generating an image data signal corresponding to each period of a plurality of periods, and for supplying the corresponding image data signal to the data driver. The power supply controller controls the driving voltage to block light emitting during a first view point image non-light emitting period and a second view point image non-light emitting period.

Abstract: An organic light emitting display including an image display unit including a plurality of data lines arranged in a first direction, a plurality of scan lines arranged in a second direction, and a plurality of pixels arranged at intersections of the data lines and the scan lines; a plurality of main power source lines and auxiliary power source lines arranged to intersect each other, the plurality of main power source lines and auxiliary power source lines transmitting a first power source as a pixel power source to the pixels; and auxiliary metal layers overlapping portions of the auxiliary power source lines in regions between adjacent pixels, the auxiliary metal layers having a lower resistance value than a resistance value of the auxiliary power source lines, wherein the auxiliary metal layers are electrically coupled with the auxiliary power source lines.

Abstract: A pixel includes a first transistor coupled between a first power source and a first node, the first transistor including a gate electrode coupled to a second node, an organic light emitting diode (OLED) coupled between the first node and a second power source, a second transistor for supplying a data signal to the second node in response to a scan signal, a third transistor having a source electrode and a drain electrode electrically coupled to each other, the third transistor being coupled to the first power source and the second node, and a fourth transistor having a source electrode and a drain electrode electrically coupled to each other, the fourth transistor being coupled between the second node and the first node.

Abstract: A semiconductor device includes a semiconductor layer on a substrate, a gate electrode electrically insulated from the semiconductor layer by a gate insulating layer, an insulating layer on the gate insulating layer and on the gate electrode, and a source electrode and a drain electrode on the insulating layer, the source and drain electrode being connected to the semiconductor layer. The source electrode overlaps at least a part of the gate electrode. The source electrode, the insulating layer, and the gate electrode overlap each other so as to provide a capacitor.

Abstract: There is provided a storage apparatus for providing an effective memory addressing method. The storage apparatus includes at least one memory and at least one controller coupled to the at least one memory to provide address information. Each of the controllers includes a first controller for providing on/off information of subfields included in one frame for driving pixels in a display panel, a third controller for horizontal position information corresponding to a selected scan line from scan lines of a display panel, and a second controller for providing vertical position information corresponding to a pixel on the selected scan line. On/off information of subfields for at least two pixels is stored in a cell located at the vertical position and the horizontal position in the at least one memory.

Abstract: A degradation compensation unit including a first operation unit receiving downscaled gray data of each pixel for one frame at set or predetermined intervals and calculating a degradation time of each pixel corresponding to the downscaled gray data; an accumulation operation unit receiving the degradation time of each pixel from the first operation unit and calculating an accumulated degradation time of each pixel by accumulating the degradation time of each pixel; a weight calculation unit receiving the accumulated degradation time of each pixel from the accumulation operation unit and calculating a degradation compensation weight for each pixel based on the accumulated degradation time of each pixel; and a second operation unit producing compensated gray data for each pixel corresponding to the degradation compensation weight for each pixel, which is received from the weight calculation unit, and providing the compensated gray data for each pixel to a data driver.

Abstract: An organic light-emitting display includes a scan driver for transmitting scan signals to scan lines, a data driver for transmitting data signals to data lines, an emission driver for transmitting light emission control signals to light emission control lines, and a display unit including a plurality of pixels coupled to the scan lines, the data lines, and the light emission control lines. The emission driver includes a plurality of stages, and each of the stages includes a transistor having a first electrode coupled to a first power source, a second electrode coupled to one of the light emission control lines, and a gate electrode coupled to an input terminal to which a block control signal is input.