Abstract: An array substrate of in-plane switching (IPS) mode liquid crystal display device includes auxiliary patterns extended from a first conductive line under the common line in order to prevent a short caused by residues of metallic material that is used for forming a data line and the pixel electrode.

Abstract: An in-plane switching mode liquid crystal display includes a first substrate and a second substrate, a first electrode on the first substrate, a gate insulating film on an entire surface of the first substrate, a second electrode on the gate insulating film for forming an in-plane electric field, together with the first electrode, a protection film on the first electrode and the second electrode, an asymmetric transparent electrode on the protection film, and a liquid crystal layer between the first substrate and the second substrate, thereby shielding against signal distortion caused by Cr black matrix, reducing vertical crosstalk and reducing the driving voltage.

Abstract: An LCD provided with an electrostatic protecting circuit includes a plurality of signal lines formed at constant intervals, a common electrode arranged in a vertical direction to the signal lines, a plurality of first electrostatic protecting circuits respectively arranged at one side of the common electrode between adjacent first and second signal lines in pairs to be connected with the first signal lines of the respective pairs and the common electrode, and a plurality of second electrostatic protecting circuits arranged at the other side of the common electrode to be connected with the second signal lines of the respective pairs and the common electrode. Thus, a narrow space of the signal lines can efficiently be used and the LCD of high resolution can be obtained.

Abstract: The electrostatic discharge (ESD) protection device for a liquid crystal display using a chip on glass (COG) package is provided. The ESD protection device includes a plurality of gate lines and data lines each of which has an output pad at its end. A plurality of gate line input pads and data line input pads are formed opposite to the output pads of the gate lines and data lines, respectively. A common electrode is formed between the plurality of gate line input pads and output pads and between the data line input pads and output pads. A plurality of electrostatic discharge protection circuits are connected between the input pads and the common electrodes to protect the input pads from electrostatic discharge.