Patents by Inventor Jeong Kwak

Jeong Kwak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240132652
    Abstract: The present disclosure relates to a thermoplastic polyurethane composition for injection molding and a method for manufacturing the same. Specifically, the thermoplastic polyurethane composition includes 0.5% by weight to 10.0% by weight of a sulfonate diol, 13% by weight to 60% by weight of an isocyanate, 30% by weight to 70% by weight of an ether-containing polyester polyol, and 5% by weight to 40% by weight of a chain extender.
    Type: Application
    Filed: April 17, 2023
    Publication date: April 25, 2024
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION, DONGSUNG CHEMICAL Co., Ltd., HANWHA ADVANCED MATERIALS CORPORATION
    Inventors: Boo Youn An, In Soo Han, Sang Hyuk Lee, Jae Chan Lee, Hoon Jeong Kim, Gyu Min Lee, Sung Bok Kwak, Dong Ju Lee, Jae Yong Lee
  • Patent number: 11960159
    Abstract: Provided are a polyamideimide film, a window cover film, and a display panel including the same. More specifically, a polyamideimide film including an amideimide structure derived from a dianhydride, a diamine, and an aromatic diacid dichloride is provided, wherein a chlorine content in the film is 5 to 33 ppm and a yellow index change amount ?YI is 5 or less, the yellow index change amount being measured in accordance with ASTM E313 after repeating a process of irradiating 0.55 W/m2 of UVA at 340 nm at 40° C. for 20 hours and then blocking UVA for 4 hours three times.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: April 16, 2024
    Assignees: SK Innovation Co., Ltd., SK ie technology Co., Ltd.
    Inventors: Hyeon Jeong Kim, Hye Ri Kim, Se Rah Moon, Sang Yoon Park, Hyo Shin Kwak
  • Patent number: 11935751
    Abstract: Exemplary deposition methods may include delivering a boron-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the boron-containing precursor and the nitrogen-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the boron-containing precursor or the nitrogen-containing precursor may be greater than or about 2:1. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a boron-and-nitrogen material on a substrate disposed within the processing region of the semiconductor processing chamber.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: March 19, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Siyu Zhu, Chuanxi Yang, Hang Yu, Deenesh Padhi, Yeonju Kwak, Jeong Hwan Kim, Qian Fu, Xiawan Yang
  • Publication number: 20240081385
    Abstract: A seasoning provision device according to the present invention comprises: a work unit provided to acquire the weight of a food material to be loaded thereon; a seasoning provision unit provided to form a semi-finished product by providing seasoning of a seasoning serving amount, which is a predetermined weight, to the food material loaded on the work unit; and a processor electrically connected to the work unit and the seasoning provision unit, wherein the processor controls the seasoning provision unit so that seasoning is provided according to the seasoning serving amount determined on the basis of the weight of the food material acquired by the work unit.
    Type: Application
    Filed: December 30, 2021
    Publication date: March 14, 2024
    Applicant: CJ CHEILJEDANG CORPORATION
    Inventors: Dong Ju KWAK, Tae Hyun JUNG, Hee Jeong LIM, Kyung Taek PARK
  • Patent number: 10546893
    Abstract: A variable resistive memory device may include a semiconductor substrate, a device layer, an upper metal interconnect, a plurality of memory cells, and an uppermost metal interconnect. The device layer may be formed on the semiconductor substrate including memory cell array regions, and may include a plurality of lower metal interconnect layers. The upper metal interconnect may be arranged on the device layer, and may include a plurality of metal patterns. The plurality of memory may be arranged over the device layer in which the upper metal interconnect is formed and are in contact with certain metal patterns selected from the metal patterns constituting the upper metal interconnect. The uppermost metal interconnect may be located over the plurality of memory cells, and may be in contact with other portion of the metal patterns constituting the upper metal interconnect.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: January 28, 2020
    Assignee: SK hynix Inc.
    Inventors: Young Hee Yoon, Eun Jeong Kwak
  • Publication number: 20180061891
    Abstract: A variable resistive memory device may include a semiconductor substrate, a device layer, an upper metal interconnect, a plurality of memory cells, and an uppermost metal interconnect. The device layer may be formed on the semiconductor substrate including memory cell array regions, and may include a plurality of lower metal interconnect layers. The upper metal interconnect may be arranged on the device layer, and may include a plurality of metal patterns. The plurality of memory may be arranged over the device layer in which the upper metal interconnect is formed and are in contact with certain metal patterns selected from the metal patterns constituting the upper metal interconnect. The uppermost metal interconnect may be located over the plurality of memory cells, and may be in contact with other portion of the metal patterns constituting the upper metal interconnect.
    Type: Application
    Filed: April 20, 2017
    Publication date: March 1, 2018
    Applicant: SK hynix Inc.
    Inventors: Young Hee YOON, Eun Jeong KWAK
  • Patent number: 9417055
    Abstract: An apparatus and a system for measuring the thickness of a thin film are provided. The apparatus includes a signal detector, a Fast Fourier Transform (FFT) generator, an Inverse Fast Fourier Transform (IFFT) generator, and a thickness analyzer. The signal detector detects an electric field signal with respect to a reflected light that is reflected from a thin film. The FFT generator performs FFT with respect to the electric field signal to separate a DC component from an AC component of the electric field signal. The IFFT generator receives the separated AC component of the electric field signal, performs IFFT with respect to the AC component, and extracts a phase value of the AC component. The thickness analyzer measures the thickness of the thin film using the extracted phase value.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: August 16, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Yoon Ryu, Sang-Kil Lee, Chung-Sam Jun, Woo-Seok Ko, Ho-Jeong Kwak, Souk Kim, Kwan-Woo Ryu, Yu-Sin Yang
  • Publication number: 20160061583
    Abstract: An apparatus and a system for measuring the thickness of a thin film are provided. The apparatus includes a signal detector, a Fast Fourier Transform (FFT) generator, an Inverse Fast Fourier Transform (IFFT) generator, and a thickness analyzer. The signal detector detects an electric field signal with respect to a reflected light that is reflected from a thin film. The FFT generator performs FFT with respect to the electric field signal to separate a DC component from an AC component of the electric field signal. The IFFT generator receives the separated AC component of the electric field signal, performs IFFT with respect to the AC component, and extracts a phase value of the AC component. The thickness analyzer measures the thickness of the thin film using the extracted phase value.
    Type: Application
    Filed: July 14, 2015
    Publication date: March 3, 2016
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Yoon RYU, Sang-Kil LEE, Chung-Sam JUN, Woo-Seok KO, Ho-Jeong KWAK, Souk KIM, Kwan-Woo RYU, Yu-Sin YANG
  • Publication number: 20150053336
    Abstract: Disclosed are a process module, a fabrication method thereof, and a substrate processing method using the process module. The process module includes a structure in which cell substrates are fixed on a carrier member by an adhesive according to a preset alignment standard. The fabrication method includes aligning the cell substrates according to a preset alignment standard, applying an adhesive to at least one of surfaces facing each other between the cell substrates and the carrier member, and attaching the cell substrates to the carrier member by using the adhesive. The substrate processing method includes performing the substrate processing process of the cell substrates at the same time by using the process module integrated with the cell substrates. The substrate processing method selectively includes calibrating the alignment standard for the cell substrates in the substrate processing process to an alignment state of the cell substrates in the process module.
    Type: Application
    Filed: February 19, 2014
    Publication date: February 26, 2015
    Inventors: Yong Jin Lim, Jae Jeong Kwak
  • Publication number: 20070020397
    Abstract: Disclosed herein is a method of fabricating a printed circuit board using an imprinting process, including forming a plating layer on an insulating layer having a plurality of recessed patterns formed through an imprinting process, and etching and polishing the portion of the plating layer using an etchant, resulting in a low polishing process cost and eliminating the need for an additional polishing process, because deterioration of the surface of the insulting layer is prevented.
    Type: Application
    Filed: May 16, 2006
    Publication date: January 25, 2007
    Inventors: Jae Cho, Myeong Hong, Seung Ra, Il Maeng, Jeong Kwak, Choon Lee, Sang Lee
  • Publication number: 20060226566
    Abstract: The present invention relates to an imprinting apparatus, system and method. Specifically, the present invention relates to an imprinting apparatus, system and method, which can be applied to a large substrate, in which a substrate is aligned, imprinted through sequential pressurization by the imprinting apparatus to form a circuit pattern on the substrate and easily released from the imprinting apparatus.
    Type: Application
    Filed: January 5, 2006
    Publication date: October 12, 2006
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jeong Kwak, Il Maeng, Seung Ra
  • Publication number: 20060222833
    Abstract: The present invention relates to an imprinting mold for a printed circuit board, having excellent durability, and a method of manufacturing a printed circuit board using the same. Specifically, this invention provides an imprinting mold for a printed circuit board, having excellent durability, in which the mold having a surface structure corresponding to a plurality of via holes and a pattern to be formed is prepared by incorporating 30-80 parts by weight of a filler, having an average particle size of 0.1-5.0 ?m, into 100 parts by weight of a heat or UV curing prepolymer. In addition, a method of manufacturing a printed circuit board using the imprinting mold is provided.
    Type: Application
    Filed: January 6, 2006
    Publication date: October 5, 2006
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Il Maeng, Myeong Hong, Choon Lee, Jeong Kwak, Jae Cho, Seung Ra