Abstract: A touch screen, a touch panel, and a driving method thereof are provided. The touch panel recognizes a user's touch, and includes a plurality of driving lines arranged in a first direction. A plurality of sensing lines are arranged in a direction crossing the first direction. Pixels are at locations where the driving lines and the sensing lines cross each other. Some of the pixels include mutual capacitance type pixels that recognize the user's touch by mutual capacitance, and at least part of the remainder of the pixels include self-capacitance type pixels that recognize the user's touch by self-capacitance.

Abstract: A touch screen, a touch panel, and a driving method thereof are provided. The touch panel recognizes a user's touch, and includes a plurality of driving lines arranged in a first direction. A plurality of sensing lines are arranged in a direction crossing the first direction. Pixels are at locations where the driving lines and the sensing lines cross each other. Some of the pixels include mutual capacitance type pixels that recognize the user's touch by mutual capacitance, and at least part of the remainder of the pixels include self-capacitance type pixels that recognize the user's touch by self-capacitance.

Abstract: A method and apparatus for a modified noise-coupled modulator using zero optimization technique is disclosed. By realizing the resonator coefficient as a part of branches other than those of the main transfer function, the problem of improving SQNR without degrading other specifications is solved. Second order noise coupling is used to implement zeros without using feedback branches going into the first integrator. Embodiments use a first-order modulator, second-order noise coupling and a resonator. It allows lower power consumption and smaller size by removing small capacitor values and gain factors and reducing the number of amplifiers.

Abstract: A display driving integrated circuit (IC) capable of reducing the number of transmission lines for transmitting gray-scale data from a memory. The display driving IC receives M-bit gray-scale data to represent the gray scale of one pixel and drives a panel including a plurality of pixels. The display driving IC includes a memory storing gray-scale data representing the gray scales of the plurality of pixels, a source driver receiving the gray-scale data from the memory through transmission lines and transmitting the received gray-scale data to the panel, and at least one multiplexer to transmit the M-bit gray-scale data representing the gray scale of one pixel through L transmission lines, wherein the value of L is smaller than the value of M.

Abstract: A voltage reference generator includes a current source for generating a source current in response to a control voltage and a current sink for conducting the source current to generate a reference voltage. Additionally, a switch block is configurable to determine the level of the source current conducted through the current sink. Furthermore, a reference current generator includes transistors operating in weak inversion with an active load coupled to one of the transistors.

Abstract: An apparatus for and method of driving display data having a multiplex structure of several steps, in which the display data driving apparatus includes a memory unit storing gradation data of M bits (where M is a natural number) for driving a plurality of pixels included in a display panel, M/N first multiplexer (where M/N is a natural number) first multiplexers receiving the M bit gradation data that is divided into gradation data of N bits (where N is a natural number), and multiplexing the N bit gradation data, a second multiplexer multiplexing the M/N bit gradation data that is output by the M/N first multiplexers, and a source driver circuit receiving the gradation data that is output by the second multiplexer and transmitting the received gradation data to the display panel.

Abstract: An input and output circuit includes a common input and output node, an abnormal voltage detector and a clock generating circuit. The common input and output node is used as an output node in a normal operation mode and used as an input node in a test operation mode where an abnormal voltage level is inputted to the common input and output node. The abnormal voltage detector generates an abnormal voltage signal based upon a detection of the abnormal voltage level at the common input and output node in the test operation mode. The clock generating circuit outputs a first clock signal to the common input and output node in the normal operation mode and outputs a second clock signal to an external circuit in response to the abnormal voltage signal in the test operation mode. Therefore, time and expenses for testing the input and output circuit may be reduced.

Abstract: A display driving integrated circuit (IC) capable of reducing the number of transmission lines for transmitting gray-scale data from a memory. The display driving IC receives M-bit gray-scale data to represent the gray scale of one pixel and drives a panel including a plurality of pixels. The display driving IC includes a memory storing gray-scale data representing the gray scales of the plurality of pixels, a source driver receiving the gray-scale data from the memory through transmission lines and transmitting the received gray-scale data to the panel, and at least one multiplexer to transmit the M-bit gray-scale data representing the gray scale of one pixel through L transmission lines, wherein the value of L is smaller than the value of M.

Abstract: A voltage reference generator includes a current source for generating a source current in response to a control voltage and a current sink for conducting the source current to generate a reference voltage. Additionally, a switch block is configurable to determine the level of the source current conducted through the current sink. Furthermore, a reference current generator includes transistors operating in weak inversion with an active load coupled to one of the transistors.

Abstract: An input and output circuit includes a common input and output node, an abnormal voltage detector and a clock generating circuit. The common input and output node is used as an output node in a normal operation mode and used as an input node in a test operation mode where an abnormal voltage level is inputted to the common input and output node. The abnormal voltage detector generates an abnormal voltage signal based upon a detection of the abnormal voltage level at the common input and output node in the test operation mode. The clock generating circuit outputs a first clock signal to the common input and output node in the normal operation mode and outputs a second clock signal to an external circuit in response to the abnormal voltage signal in the test operation mode. Therefore, time and expenses for testing the input and output circuit may be reduced.

Abstract: The present invention provides a process for preparing an imidazole derivative or its salt which comprises reacting a tetrahydrofuran or tetrahydropyran derivative with formamidine or its salt in the presence of a base.

Abstract: The present invention provides a process for preparing an imidazole derivative or its salt which comprises reacting a tetrahydrofuran or tetrahydropyran derivative with formamidine or its salt in the presence of a base.

Abstract: The present invention relates to novel pyrimidine derivatives of the formulae (I-1) and (I-2) and pharmaceutically acceptable salts thereof which possess an excellent anti-secretory activity, pharmaceutical compositions containing same as an active ingredient, their novel intermediates, and processes for the preparation thereof: ##STR1## wherein: R.sub.4 and R.sub.5, which may be the same or different, are independently hydrogen or a C.sub.1 -C.sub.3 alkyl group, or jointly form a cyclopentyl or cyclohexyl ring;A is a group of formula(II): ##STR2## wherein R.sub.1 and R.sub.2 are, independently of each other, hydrogen or a C.sub.1 -C.sub.3 alkyl group, and R.sub.3 is hydrogen, a C.sub.1 -C.sub.3 alkyl group or a halogen; andB is 1-(substituted)-1,2,3,4-tetrahydroisoquinolin-2-yl of formula (III-1) or 7-(substituted)-4,5,6,7-tetrahydrothieno?2,3-c!pyridin-6-yl of formula (III-2) ##STR3## wherein R.sub.6 is hydrogen or a C.sub.1 -C.sub.3 alkyl group.

Abstract: A quinazoline derivative represented by formula(I) or a pharmaceutically acceptable salt thereof is useful for the treatment of peptic ulcer, wherein: ##STR1## R.sub.1 and R.sub.2 are each hydrogen or a C.sub.1 -C.sub.4 alkyl group; R.sub.3 is hydrogen or a halogen;R.sub.4, R.sub.5, R.sub.6, R.sub.7, R.sub.8 and R.sub.9, which may be the same or different, are each hydrogen, a C.sub.1 -C.sub.4 alkyl group, a cyclopropyl group, or a C.sub.1 -C.sub.4 alkyl group substituted with a halogen; andR.sub.10 is a methoxy group.