Abstract: The present disclosure relates to ultra-high speed digital signal integrity improving structures. Each structure in the present disclosure includes a first unit structure and a second unit structure of the same or different shapes arranged to face each other on the left and right sides along a longitudinal direction of a balanced line, centered around a coplanar stripline (CPS) or parallel stripline (PSL) formed on a substrate. At least one of the first unit structure and the second unit structure includes a first side close to the balanced line and having a linear or curve shape; a second side facing the first side; and left and right sides connecting the first side and the second side. Here, the width of the first side is less than or equal to that of the second side, the left and right sides have a linear or non-linear slope, and the width from the first side to the second side is configured to change continuously or discontinuously.

Abstract: A main server for controlling laser irradiation of a movement path of a robot, the main server including a communication unit configured to communicate with a camera module and a laser irradiation module; and a controller configured to: receive, via the communication unit, an image of a robot captured by the camera module, identify a location of the robot in the image captured by the camera module, generate a movement path of the robot based on sensing information, and transmit, via the communication unit, movement path information to the laser irradiation module for outputting the movement path to a vicinity of the robot with a laser for the robot to follow, in which the sensing information includes first information about an obstacle sensed by the camera module or second information about the obstacle sensed by the laser irradiation module.

Abstract: A main server for controlling laser irradiation of a movement path of a robot, the main server including a communication unit configured to communicate with a camera module and a laser irradiation module; and a controller configured to: receive, via the communication unit, an image of a robot captured by the camera module, identify a location of the robot in the image captured by the camera module, generate a movement path of the robot based on sensing information, and transmit, via the communication unit, movement path information to the laser irradiation module for outputting the movement path to a vicinity of the robot with a laser for the robot to follow, in which the sensing information includes first information about an obstacle sensed by the camera module or second information about the obstacle sensed by the laser irradiation module.

Abstract: An electromagnetic actuator includes a first body which includes a biased permanent magnet, a magnetic path control device which is disposed to adjust a magnetic path produced by the biased permanent magnet, at least one core which is disposed to face the biased permanent magnet and the magnetic path control device, and a coil which is wound on the at least one core so as to reinforce or cancel the magnetic path produced by the biased permanent magnet; and a second body which is separated from the biased permanent magnet and the magnetic path control device when the at least one core is between the second body and at least one of the biased permanent magnet and the magnetic path control device.

Abstract: An electromagnetic actuator includes a first body which includes a biased permanent magnet, a magnetic path control device which is disposed to adjust a magnetic path produced by the biased permanent magnet, at least one core which is disposed to face the biased permanent magnet and the magnetic path control device, and a coil which is wound on the at least one core so as to reinforce or cancel the magnetic path produced by the biased permanent magnet; and a second body which is separated from the biased permanent magnet and the magnetic path control device when the at least one core is between the second body and at least one of the biased permanent magnet and the magnetic path control device.

Abstract: A method and an apparatus for estimating a long-term transfer rate of a terminal are provided. The method for estimating the long-term transfer rate includes: calculating a burst transfer rate of each pilot signal which is transmitted from a base station to a target terminal to calculate a long-term transfer rate; and calculating a long-term transfer rate of the target terminal using distribution of the calculated burst transfer rates and the number (N) of terminals that are serviced by the base station.

Abstract: A method and an apparatus for estimating a long-term transfer rate of a terminal are provided. The method for estimating the long-term transfer rate includes: calculating a burst transfer rate of each pilot signal which is transmitted from a base station to a target terminal to calculate a long-term transfer rate; and calculating a long-term transfer rate of the target terminal using distribution of the calculated burst transfer rates and the number (N) of terminals that are serviced by the base station.

Abstract: The present invention relates to a plasma display apparatus. The plasma display apparatus comprises an upper substrate, a first electrode and a second electrode formed on the upper substrate, a lower substrate disposed to face the upper substrate, and a third electrode and a barrier rib formed in the lower substrate. First and second black matrices are formed in the upper substrate and are separated from each other on a same straight line. According to the present invention, while maintaining the function of improving a contrast ratio and reflectance of a black matrix, a short and a spotted pattern that may occur when simultaneous exposure is performed can be reduced, and so the picture quality, the cost of production, and efficiency can be improved.

Abstract: The present invention relates to a plasma display apparatus. The plasma display apparatus comprises an upper substrate, a first electrode and a second electrode formed on the upper substrate, a lower substrate disposed to face the upper substrate, and a third electrode and a barrier rib formed in the lower substrate. First and second black matrices are formed in the upper substrate and are separated from each other on a same straight line. According to the present invention, while maintaining the function of improving a contrast ratio and reflectance of a black matrix, a short and a spotted pattern that may occur when simultaneous exposure is performed can be reduced, and so the picture quality, the cost of production, and efficiency can be improved.

Abstract: Disclosed are a plasma display panel and a method of manufacturing the same. The plasma display panel according to the present invention comprises a front panel comprising a protective layer and a rear panel disposed apart from the front panel by a predetermined distance. The protective layer comprising magnesium oxide (MgO) is doped with scandium (Sc) and calcium (Ca). The plasma display panel according to the present invention has the advantage of excellent temperature-dependent panel characteristic. The plasma display panel according to the present invention also has the further advantage of excellent voltage margin of the address voltage.

Abstract: Integrated circuit devices, for example, dynamic random access memory (DRAM) devices, are provided including an integrated circuit substrate having a cell array region and a peripheral circuit region. A buried contact plug is provided on the integrated circuit substrate in the cell array region and a resistor is provided on the integrated circuit substrate in the peripheral circuit region. A first pad contact plug is provided on the buried contact plug in the cell array region and a second pad contact plug is provided on the resistor in the peripheral circuit region. An ohmic layer is provided between the first pad contact plug and the buried contact plug and between the second pad contact plug and the resistor. Related methods of fabricating integrated circuit devices are also provided.

Abstract: A metal-oxy-nitride seed dielectric layer can be formed on a metal-nitride lower electrode of a metal-insulator-metal (MIM) type capacitor. The metal-oxy-nitride seed dielectric layer can act as a barrier layer to reduce a reaction with the metal-nitride lower electrode during, for example, backend processing used to form upper levels of metallization/structures in an integrated circuit including the MIM type capacitor. Nitrogen included in the metal-oxy-nitride seed dielectric layer can reduce the type of reaction, which may occur in conventional type MIM capacitors. A metal-oxide main dielectric layer can be formed on the metal-oxy-nitride seed dielectric layer and can remain separate from the metal-oxy-nitride seed dielectric layer in the MIM type capacitor. The metal-oxide main dielectric layer can be stabilized (using, for example, a thermal or plasma treatment) to remove defects (such as carbon) therefrom and to adjust the stoichiometry of the metal-oxide main dielectric layer.

Abstract: A MIM capacitor can include a doped polysilicon contact plug in an interlayer insulating film. A lower electrode of the MIM capacitor includes a transition metal nitride film is on the doped polysilicon contact plug. A transition metal silicide film is between the doped polysilicon contact plug and the transition metal nitride film.

Abstract: Integrated circuit devices, for example, dynamic random access memory (DRAM) devices, are provided including an integrated circuit substrate having a cell array region and a peripheral circuit region. A buried contact plug is provided on the integrated circuit substrate in the cell array region and a resistor is provided on the integrated circuit substrate in the peripheral circuit region. A first pad contact plug is provided on the buried contact plug in the cell array region and a second pad contact plug is provided on the resistor in the peripheral circuit region. An ohmic layer is provided between the first pad contact plug and the buried contact plug and between the second pad contact plug and the resistor. Related methods of fabricating integrated circuit devices are also provided.

Abstract: Integrated circuit devices, for example, dynamic random access memory (DRAM) devices, are provided including an integrated circuit substrate having a cell array region and a peripheral circuit region. A buried contact plug is provided on the integrated circuit substrate in the cell array region and a resistor is provided on the integrated circuit substrate in the peripheral circuit region. A first pad contact plug is provided on the buried contact plug in the cell array region and a second pad contact plug is provided on the resistor in the peripheral circuit region. An ohmic layer is provided between the first pad contact plug and the buried contact plug and between the second pad contact plug and the resistor. Related methods of fabricating integrated circuit devices are also provided.

Abstract: Embodiments of the present invention include methods of forming a contact to a capacitor in a semiconductor device. A metal silicide layer is formed at a top surface of a conductive plug of the semiconductor device that is coupled to a bottom electrode of the capacitor to provide an ohmic contact therebetween. Forming a metal silicide layer may include exposing a surface of the conductive plug, depositing a metal layer of the bottom electrode on the exposed surface of the conductive plug and thermally processing the semiconductor device to react a part of the deposited metal layer and the conductive plug to form the metal silicide layer. Methods of forming a semiconductor device including a capacitor having a metal silicide layer connecting a bottom electrode of the capacitor and a conductive plug are also provided.

Abstract: In one embodiment, a method of fabricating a MIM capacitor includes forming an interlayer insulating layer having a contact plug on a semiconductor substrate, forming an etch stop layer on the interlayer insulating layer, and forming a mold layer having an opening exposing the contact plug on the etch stop layer. Next, a first conductive layer for the lower electrode is formed on the sidewalls and the bottom of the opening, and a photoresistive layer is formed on the first conductive layer. The mold layer and the photoresistive layer are then removed, and a composite dielectric layer is formed on the lower electrode. A second conductive layer is then formed on the composite dielectric layer. The composite dielectric layer may be composed of an oxide hafnium (HfO2) dielectric layer and an oxide aluminum (Al2O3) dielectric layer, with the oxide hafnium dielectric layer having a thickness of about 20 ? to about 50 ?.

Abstract: Methods of forming metal-insulator-metal type capacitors in integrated circuit memory devices can include crystallizing an HfO2 dielectric layer on a lower electrode of a capacitor structure in a low temperature plasma treatment at a temperature in range between about 250 degrees Centigrade and about 450 degrees Centigrade. An upper electrode can be formed on the HfO2 dielectric layer.

Abstract: A metal-oxy-nitride seed dielectric layer can be formed on a metal-nitride lower electrode of a meta-insulator-metal (MIM) type capacitor. The metal-oxy-nitride seed dielectric layer can act as a barrier layer to reduce a reaction with the metal-nitride lower electrode during, for example, backend processing used to form upper levels of metallization/structures in an integrated circuit including the MIM type capacitor. Nitrogen included in the metal-oxy-nitride seed dielectric layer can reduce the type of reaction, which may occur in conventional type MIM capacitors. A metal-oxide main dielectric layer can be formed on the metal-oxy-nitride seed dielectric layer and can remain separate from the metal-oxy-nitride seed dielectric layer in the MIM type capacitor. The metal-oxide main dielectric layer can be stabilized (using, for example, a thermal or plasma treatment) to remove defects (such as carbon) therefrom and to adjust the stoichiometry of the metal-oxide main dielectric layer.

Abstract: A MIM capacitor can include a doped polysilicon contact plug in an interlayer insulating film. A lower electrode of the MIM capacitor includes a transition metal nitride film is on the doped polysilicon contact plug. A transition metal silicide film is between the doped polysilicon contact plug and the transition metal nitride film.