Abstract: Provided are a semiconductor chip, a semiconductor package and a fabricating method thereof, which can reduce or prevent cracks from being generated or propagated due to an external pressure. The semiconductor chip includes a semiconductor substrate including a first region and a second region, a plurality of interlayer insulation layers formed on the semiconductor substrate, a first crack stopper formed in the plurality of interlayer insulation layers of the first region, an interconnector formed in the plurality of interlayer insulation layers of the second region, a pad wire formed on the plurality of interlayer insulation layers, electrically connected to the interconnector in the second region and extending to the first region, a bonding pad on the plurality of interlayer insulation layers of the first region, electrically connected to the pad wire, and a protection layer covering the pad wire and exposing the bonding pad.

Abstract: Provided are a semiconductor chip, a semiconductor package and a fabricating method thereof, which can reduce or prevent cracks from being generated or propagated due to an external pressure. The semiconductor chip includes a semiconductor substrate including a first region and a second region, a plurality of interlayer insulation layers formed on the semiconductor substrate, a first crack stopper formed in the plurality of interlayer insulation layers of the first region, an interconnector formed in the plurality of interlayer insulation layers of the second region, a pad wire formed on the plurality of interlayer insulation layers, electrically connected to the interconnector in the second region and extending to the first region, a bonding pad on the plurality of interlayer insulation layers of the first region, electrically connected to the pad wire, and a protection layer covering the pad wire and exposing the bonding pad.