Abstract: A semiconductor design optimization system that includes: a data base configured to store design data, a training data preprocessing unit configured to preprocess the design data and generate training data, a data learning unit configured to generate a physical property prediction model by training using the training data, a physical property prediction unit configured to generate predicted physical property data including information associated with predicted physical property values for each region of a semiconductor device to be fabricated, wherein the physical property prediction unit is configured to input, into the physical property prediction model, input data including information associated with design drawings of the semiconductor device to be fabricated, and a layout generator configured generate a design layout optimized to distribute the predicted physical property values for each region of the semiconductor device to be fabricated by modifying the design drawings based on the predicted physical

Abstract: A semiconductor device manufacturing method includes providing a first layer having a first surface, providing a second layer including a trench that exposes the first surface, onto the first layer, forming a first polymer layer that fills the trench, and performing a heat treatment process on the first polymer layer to form a second polymer layer. A second surface of the second layer is exposed by the trench, the first polymer layer includes a first portion being in contact with the first surface, and a second portion being in contact with the second surface, when the heat treatment process is performed, the first portion of the first polymer layer is decomposed, when the heat treatment process is performed, the second portion of the first polymer layer is cross-linked to form the second polymer layer, and physical properties of the first layer are different from physical properties of the second layer.

Abstract: The present disclosure provides a method for manufacturing a semiconductor device using selective vapor deposition and selective desorption. The method for manufacturing a semiconductor device includes providing a first layer having a first surface, and forming a second layer on the first layer such that a portion of the first surface is not covered by the second layer. The second layer has a second surface that meets the first surface. An inhibitor layer is formed on the first surface and the second surface, and the inhibitor layer on the second surface is selectively removed to expose the second surface. An interest layer is formed on the second surface. Physical properties of the first layer are different from physical properties of the second layer.

Abstract: Provided is a photoresist composition including a plasma light absorber and a method of manufacturing semiconductor devices using the same. The photoresist composition may include a developable polymer, a photoacid generator, a plasma light absorber, and an organic solvent. The plasma light absorber may be relatively transmissive to light used with a photolithographic patterning process (e.g., ultraviolet light) to pattern a layer formed with the photoresist composition and be relatively absorptive to light created in a subsequent etching process (such as light generated from a plasma). When forming a semiconductor device, a patterned photoresist layer may be more precisely generated and may better maintain is desired properties when used to etch various target layers of the semiconductor device.

Abstract: Provided is a method of fabricating an integrated circuit device, the method including: forming, on a substrate, a developable bottom anti-reflective coating (DBARC) layer including a chemically amplified polymer; forming, on the DBARC layer, a photoresist layer including a non-chemically amplified resin and a photoacid generator (PAG); generating an acid from the PAG in a first region selected from the photoresist layer, by exposing the first region; diffusing the acid in the exposed first region into a first DBARC region of the DBARC layer, the first DBARC region facing the first region; and removing the first region and the first DBARC region by developing the photoresist layer and the DBARC layer.

Abstract: Provided is a photoresist composition including a plasma light absorber and a method of manufacturing semiconductor devices using the same. The photoresist composition may include a developable polymer, a photoacid generator, a plasma light absorber, and an organic solvent. The plasma light absorber may be relatively transmissive to light used with a photolithographic patterning process (e.g., ultraviolet light) to pattern a layer formed with the photoresist composition and be relatively absorptive to light created in a subsequent etching process (such as light generated from a plasma). When forming a semiconductor device, a patterned photoresist layer may be more precisely generated and may better maintain is desired properties when used to etch various target layers of the semiconductor device.

Abstract: Provided is a method of fabricating an integrated circuit device, the method including: forming, on a substrate, a developable bottom anti-reflective coating (DBARC) layer including a chemically amplified polymer; forming, on the DBARC layer, a photoresist layer including a non-chemically amplified resin and a photoacid generator (PAG); generating an acid from the PAG in a first region selected from the photoresist layer, by exposing the first region; diffusing the acid in the exposed first region into a first DBARC region of the DBARC layer, the first DBARC region facing the first region; and removing the first region and the first DBARC region by developing the photoresist layer and the DBARC layer.