Patents by Inventor Jeonghyuk Park
Jeonghyuk Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240128140Abstract: In one general aspect, an apparatus can include a semiconductor die, a molding material disposed around at least a portion of the semiconductor die, and a pair of leads electrically coupled to the semiconductor die and aligned along a first direction from the molding material. The molding material can define an elongated protrusion aligned along a second direction orthogonal to the first direction, and a notch disposed between the pair of leads.Type: ApplicationFiled: October 12, 2023Publication date: April 18, 2024Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Seungwon IM, Jeonghyuk PARK, Keunhyuk LEE, Jerome TEYSSEYRE, Paolo BILARDO
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Publication number: 20240128319Abstract: An integrated circuit device includes a first conductive pattern on a substrate, a second conductive pattern surrounding at least a portion of the first conductive pattern and covering a lower portion of a sidewall of the first conductive pattern, an upper insulating structure on the first conductive pattern and the second conductive pattern, and an upper conductive pattern extending in a vertical direction through the upper insulating structure. The upper conductive pattern includes a main plug portion overlapping the first conductive pattern and the second conductive pattern in the vertical direction, and a vertical extension portion extending from a local region of the main plug portion toward the substrate, the vertical extension portion covering an upper portion of the sidewall of the first conductive pattern and overlapping the second conductive pattern in the vertical direction.Type: ApplicationFiled: May 23, 2023Publication date: April 18, 2024Applicant: Samsung Electronics Co., Ltd.Inventors: Hyunwoo KIM, Wandon KIM, Jaeseoung PARK, Hyunbae LEE, Jeonghyuk YIM
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Publication number: 20240088007Abstract: A package includes a first direct bonded metal (DBM) substrate, a first semiconductor die disposed on a top surface of the first DBM substrate, a second DBM substrate disposed at a height above the first DBM substrate, and a second semiconductor die disposed on a top surface of the second DBM substrate. A wire bond is made between the first semiconductor die disposed on the top surface of the first DBM substrate and the second semiconductor die disposed on the top surface of the second DBM substrate.Type: ApplicationFiled: September 13, 2022Publication date: March 14, 2024Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jonghwan BAEK, Jeonghyuk PARK, Seungwon IM, Keunhyuk LEE, Dukyong LEE
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Publication number: 20230325349Abstract: Disclosed is a method for implementing re-instantiation for a database, which is performed by a computing device, which may include: acquiring at least one redo log; acquiring an address of a data block based on the at least one redo log; acquiring information on changed matters included in a control file based on the at least one redo log; and modifying a first database based on the address of the data block and the information on the changed matters.Type: ApplicationFiled: August 22, 2022Publication date: October 12, 2023Inventors: Jeonghyuk PARK, Dongyun YANG, Sangyoung PARK
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Publication number: 20230253393Abstract: Described implementations provide wireless, surface mounting of at least two semiconductor die on die attach pads (DAPs) of the semiconductor package, where the at least two semiconductor die are electrically connected by a clip. A stress buffer layer may be provided on the clip, and a heatsink may be provided on the stress buffer layer. The heatsink may be secured with an external mold material.Type: ApplicationFiled: April 17, 2023Publication date: August 10, 2023Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jonghwan BAEK, JeongHyuk PARK, Seungwon IM, Keunhyuk LEE
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Publication number: 20230245953Abstract: Implementations of semiconductor packages may include a substrate, a first die coupled on the substrate, and a lead frame coupled over the substrate. The lead frame may include a die attach pad. Implementations of semiconductor packages may also include a second die coupled on the die attach pad. The second die may overlap the first die.Type: ApplicationFiled: April 5, 2023Publication date: August 3, 2023Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jonghwan BAEK, JeongHyuk PARK, Seungwon IM, Keunhyuk LEE
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Patent number: 11658171Abstract: Described implementations provide wireless, surface mounting of at least two semiconductor die on die attach pads (DAPs) of the semiconductor package, where the at least two semiconductor die are electrically connected by a clip. A stress buffer layer may be provided on the clip, and a heatsink may be provided on the stress buffer layer. The heatsink may be secured with an external mold material.Type: GrantFiled: December 23, 2020Date of Patent: May 23, 2023Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jonghwan Baek, JeongHyuk Park, Seungwon Im, Keunhyuk Lee
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Patent number: 11652030Abstract: Implementations of semiconductor packages may include a substrate, a first die coupled on the substrate, and a lead frame coupled over the substrate. The lead frame may include a die attach pad. Implementations of semiconductor packages may also include a second die coupled on the die attach pad. The second die may overlap the first die.Type: GrantFiled: December 29, 2020Date of Patent: May 16, 2023Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jonghwan Baek, JeongHyuk Park, Seungwon Im, Keunhyuk Lee
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Patent number: 11538963Abstract: A multilayer light emitting device having a plurality of low Si—H bonding dielectric layers is disclosed for improved p-GaN contact performance. Improved p-side contact resistance is provided using one or more bonding, via or passivation layers in a multilayer light emitting structure by the use of processes and dielectric materials and precursors that provide dielectric layers with a hydrogen content of less than 13 at. %.Type: GrantFiled: February 20, 2019Date of Patent: December 27, 2022Assignee: Ostendo Technologies, Inc.Inventors: Kameshwar Yadavalli, JeongHyuk Park, Gregory Batinica, Andrew Teren, Clarence Crouch, Qian Fan, Hussein S. El-Ghoroury
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Publication number: 20220237780Abstract: Disclosed is a method for detecting a serial section of a medical image, which is performed by a computing device. The method may include: detecting segments included in at least one tissue which exists in the medical image; estimating a number of tissue sections corresponding to the serial section and a distance between the segments based on the segments; and distinguishing tissue sections corresponding to the serial section based on the estimated number of tissue sections corresponding to a serial section and the distance between the segments.Type: ApplicationFiled: January 27, 2022Publication date: July 28, 2022Inventors: Yeong Won KIM, Kyungdoc KIM, Hong Seok LEE, Jeonghyuk PARK
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Publication number: 20220208654Abstract: Implementations of semiconductor packages may include a substrate, a first die coupled on the substrate, and a lead frame coupled over the substrate. The lead frame may include a die attach pad. Implementations of semiconductor packages may also include a second die coupled on the die attach pad. The second die may overlap the first die.Type: ApplicationFiled: December 29, 2020Publication date: June 30, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jonghwan BAEK, JeongHyuk PARK, Seungwon IM, Keunhyuk LEE
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Publication number: 20220199602Abstract: Described implementations provide wireless, surface mounting of at least two semiconductor die on die attach pads (DAPs) of the semiconductor package, where the at least two semiconductor die are electrically connected by a clip. A stress buffer layer may be provided on the clip, and a heatsink may be provided on the stress buffer layer. The heatsink may be secured with an external mold material.Type: ApplicationFiled: December 23, 2020Publication date: June 23, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jonghwan BAEK, JeongHyuk PARK, Seungwon IM, Keunhyuk LEE
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Patent number: 10770679Abstract: A display apparatus includes a first substrate corresponding to an active area, and a sealing area surrounding the active area, a second substrate facing the first substrate, a display portion in the active area, a sealing member in the sealing area between the first substrate and the second substrate, and a guide mark on one surface of the second substrate in an area where the sealing member and the second substrate overlap each other.Type: GrantFiled: May 6, 2019Date of Patent: September 8, 2020Assignee: Samsung Display Co., Ltd.Inventors: Jaewook Shin, Hyunchul Lee, Seungjoon Yoo, Dongjin Kim, Jeonghyuk Park, Soojeong Choi, Wonju Choi
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Publication number: 20190259973Abstract: A display apparatus includes a first substrate corresponding to an active area, and a sealing area surrounding the active area, a second substrate facing the first substrate, a display portion in the active area, a sealing member in the sealing area between the first substrate and the second substrate, and a guide mark on one surface of the second substrate in an area where the sealing member and the second substrate overlap each other.Type: ApplicationFiled: May 6, 2019Publication date: August 22, 2019Inventors: Jaewook Shin, Hyunchul Lee, Seungjoon Yoo, Dongjin Kim, Jeonghyuk Park, Soojeong Choi, Wonju Choi
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Patent number: 10333101Abstract: A display apparatus includes a first substrate corresponding to an active area, and a sealing area surrounding the active area, a second substrate facing the first substrate, a display portion in the active area, a sealing member in the sealing area between the first substrate and the second substrate, and a guide mark on one surface of the second substrate in an area where the sealing member and the second substrate overlap each other.Type: GrantFiled: November 7, 2016Date of Patent: June 25, 2019Assignee: Samsung Display Co. Ltd.Inventors: Jaewook Shin, Hyunchul Lee, Seungjoon Yoo, Dongjin Kim, Jeonghyuk Park, Soojeong Choi, Wonju Choi
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Publication number: 20170200916Abstract: A display apparatus includes a first substrate corresponding to an active area, and a sealing area surrounding the active area, a second substrate facing the first substrate, a display portion in the active area, a sealing member in the sealing area between the first substrate and the second substrate, and a guide mark on one surface of the second substrate in an area where the sealing member and the second substrate overlap each other.Type: ApplicationFiled: November 7, 2016Publication date: July 13, 2017Inventors: Jaewook Shin, Hyunchul Lee, Seungjoon Yoo, Dongjin Kim, Jeonghyuk Park, Soojeong Choi, Wonju Choi