Abstract: A quantum error correcting code with dynamically generated logical qubits is provided. When viewed as a subsystem code, the code has no logical qubits. Nevertheless, the measurement patterns generate logical qubits, allowing the code to act as a fault-tolerant quantum memory. Each measurement can be a two-qubit Pauli measurement.

Abstract: A method to correct a fault in the application of a Clifford circuit to a qubit register of a quantum computer comprises: (a) receiving circuit data defining the Clifford circuit; (b) receiving additional data identifying one or more measurements belonging to each of a plurality of faces of a lattice; (c) emitting an outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome for the application of the Clifford circuit to the qubit register; and (d) emitting a topological outcome code based on the circuit data, the additional data, and the outcome code, the topological outcome code including a series of check operators that support quantum-error correction via a topological decoder, thereby enabling fault correction in the application of the Clifford circuit to the qubit register.

Abstract: Aspects of the disclosure include removing a faulty qubit in a quantum circuit. The faulty qubit is determined to be in the quantum circuit, the faulty qubit being associated with a plaquette having other qubits, where adjacent plaquettes are neighboring the plaquette. A route is determined to isolate the plaquette from the adjacent plaquettes. Measurements are caused to be performed on the quantum circuit for the route that isolates the plaquette having the faulty qubit and the other qubits.

Abstract: A quantum error correcting code with dynamically generated logical qubits is provided. When viewed as a subsystem code, the code has no logical qubits. Nevertheless, the measurement patterns generate logical qubits, allowing the code to act as a fault-tolerant quantum memory. Each measurement can be a two-qubit Pauli measurement.

Abstract: A quantum computing device is provided, including a logical qubit encoding surface including a plurality of plaquettes. Each plaquette of the plurality of plaquettes may include a plurality of measurement-based qubits. The plurality of measurement-based qubits may include four data qubits and a first ancilla qubit. The first ancilla qubit may be electrically connected to the four data qubits and a second ancilla qubit included in the logical qubit encoding surface.

Abstract: Embodiments of the present disclosure include systems and methods for magic state distillation. A first matrix is generated based on a collection of indices that reference a second matrix. A set of compressed Clifford gates is determined based on the first matrix. The set of compressed Clifford gates is applied to a set of the qubits of a quantum processor. A set of magic states of the quantum processor are obtained as a result of application of the set of compressed Clifford gates. The quantum processor may be configured based on the magic states obtained.

Abstract: An apparatus and method are provided for storing and processing quantum information. More particularly, a physical layout is provided to perform Floquet codes. The physical layout includes a quantum processor having an array of qubits (e.g., columns of tetrons or hexons in which Majorana zero modes are located on topological superconductor segments) with a gateable semiconductor devices forming interference loops to perform two-qubit Pauli measurements. Coherent links between qubits in a column enable certain two-qubit Pauli measurements, especially those additional two-qubit Pauli measurements used at a boundary surrounding a region of the bulk code. The two-qubit Pauli measurements are selected to minimize a size of the interference loops. Certain embodiments perform Floquet codes in six time steps. Hexagon embodiments tile the array of qubits with unit cells of 6-gon vertical (or horizontal) bricks. Square-octagon embodiments tile the array of qubits with unit cells of two 4-gon and two 8-gon bricks.

Abstract: An apparatus and method are provided for storing and processing quantum information. More particularly, a physical layout is provided to perform Floquet codes. The physical layout includes a quantum processor having an array of qubits (e.g., columns of tetrons or hexons in which Majorana zero modes are located on topological superconductor segments) with a gateable semiconductor devices forming interference loops to perform two-qubit Pauli measurements. Coherent links between qubits in a column enable certain two-qubit Pauli measurements, especially those additional two-qubit Pauli measurements used at a boundary surrounding a region of the bulk code. The two-qubit Pauli measurements are selected to minimize a size of the interference loops. Certain embodiments perform Floquet codes in six time steps. Hexagon embodiments tile the array of qubits with unit cells of 6-gon vertical (or horizontal) bricks. Square-octagon embodiments tile the array of qubits with unit cells of two 4-gon and two 8-gon bricks.

Abstract: An apparatus and method are provided for storing and processing quantum information. More particularly, a physical layout is provided to perform Floquet codes. The physical layout includes a quantum processor having an array of qubits (e.g., columns of tetrons or hexons in which Majorana zero modes are located on topological superconductor segments) with a gateable semiconductor devices forming interference loops to perform two-qubit Pauli measurements. Coherent links between qubits in a column enable certain two-qubit Pauli measurements, especially those additional two-qubit Pauli measurements used at a boundary surrounding a region of the bulk code. The two-qubit Pauli measurements are selected to minimize a size of the interference loops. Certain embodiments perform Floquet codes in six time steps. Hexagon embodiments tile the array of qubits with unit cells of 6-gon vertical (or horizontal) bricks. Square-octagon embodiments tile the array of qubits with unit cells of two 4-gon and two 8-gon bricks.

Abstract: A computing system including a quantum computing device and a classical computing device. The computing system computes an estimated unitary matrix over a plurality of iterations that each include, at a processor, computing a current-iteration exponent, a current-iteration error parameter, and a conjugate transpose of a current-iteration estimate of the unitary matrix. Each iteration further includes transmitting the current-iteration exponent, the current-iteration error parameter, and the conjugate transpose to the quantum computing device. At the quantum computing device, each iteration further includes computing a process tomography result and outputting the process tomography result to the classical computing device. At the processor, each iteration further includes computing a distance measure between the current-iteration estimate and the process tomography result, and, when the distance measure is below a predefined constant, updating the current-iteration estimate.

Abstract: An apparatus and method are provided for storing and processing quantum information. More particularly, a physical layout is provided to perform Floquet codes. The physical layout includes a quantum processor having an array of qubits (e.g., columns of tetrons or hexons in which Majorana zero modes are located on topological superconductor segments) with a gateable semiconductor devices forming interference loops to perform two-qubit Pauli measurements. Coherent links between qubits in a column enable certain two-qubit Pauli measurements, especially those additional two-qubit Pauli measurements used at a boundary surrounding a region of the bulk code. The two-qubit Pauli measurements are selected to minimize a size of the interference loops. Certain embodiments perform Floquet codes in six time steps. Hexagon embodiments tile the array of qubits with unit cells of 6-gon vertical (or horizontal) bricks. Square-octagon embodiments tile the array of qubits with unit cells of two 4-gon and two 8-gon bricks.

Abstract: A quantum error correcting code with dynamically generated logical qubits is provided. When viewed as a subsystem code, the code has no logical qubits. Nevertheless, the measurement patterns generate logical qubits, allowing the code to act as a fault-tolerant quantum memory. Each measurement can be a two-qubit Pauli measurement.

Abstract: A quantum computing device is provided, including a logical qubit encoding surface including a plurality of plaquettes. Each plaquette of the plurality of plaquettes may include a plurality of measurement-based qubits. The plurality of measurement-based qubits may include four data qubits and a first ancilla qubit. The first ancilla qubit may be electrically connected to the four data qubits and a second ancilla qubit included in the logical qubit encoding surface.

Abstract: Embodiments of the present disclosure include systems and methods for reducing a sample complexity and a time complexity associated with noise-robust characterization of a quantum device. A plurality of copies of a Gibbs state of the quantum device in thermal equilibrium at a high-temperature. A plurality of estimates for expectation values of the plurality of copies of the Gibbs state. A plurality of cluster derivatives for a plurality of connected clusters of a low-degree Hamiltonian are calculated. A function is inverted on the plurality of estimates based on the plurality of cluster derivatives and a set of Hamiltonian coefficients are estimated for the low-degree Hamiltonian of the quantum device.

Abstract: In some embodiments, one or more unitary-valued functions are generated by a classical computer generating using projectors with a predetermined number of significant bits. A quantum computing device is then configured to implement the one or more unitary-valued functions. In further embodiments, a quantum circuit description for implementing quantum signal processing that decomposes complex-valued periodic functions is generated by a classical computer, wherein the generating further includes representing approximate polynomials in a Fourier series with rational coefficients. A quantum computing device is then configured to implement a quantum circuit defined by the quantum circuit description.

Abstract: A quantum error correcting code with dynamically generated logical qubits is provided. When viewed as a subsystem code, the code has no logical qubits. Nevertheless, the measurement patterns generate logical qubits, allowing the code to act as a fault-tolerant quantum memory. Each measurement can be a two-qubit Pauli measurement.

Abstract: A quantum decoder receives a syndrome from a quantum measurement circuit and performs various decoding operations for processing-efficient fault detection. The decoding operations include generating a decoding graph from the syndrome and growing a cluster around each one of multiple check nodes in the graph that correspond to a non-trivial value in the syndrome. Each cluster includes the check node corresponding to the non-trivial value and a set of neighboring nodes positioned within a distance of d edge-lengths from the check node. Following cluster growth, the decoder determines if, for each cluster, there exists a solution set internal to the cluster that fully explains the non-trivial syndrome bit for the cluster. If so, the decoder identifies and returns at least one solution set that fully explains the set of non-trivial bits in the syndrome.

Abstract: Embodiments of the present disclosure include systems and methods for magic state distillation. A first matrix is generated based on a collection of indices that reference a second matrix. A set of compressed Clifford gates is determined based on the first matrix. The set of compressed Clifford gates is applied to a set of the qubits of a quantum processor. A set of magic states of the quantum processor are obtained as a result of application of the set of compressed Clifford gates. The quantum processor may be configured based on the magic states obtained.

Abstract: A quantum computing system implementing surface code in a measurement circuit may be configured to translate a quantum algorithm including at least one Hadamard gate into an equivalent circuit that lacks a Hadamard gate, the circuit including Hadamard-conjugated Pauli measurements that include joint logical measurements implemented on diagonally-arranged patches of the surface code.

Abstract: A quantum computing system implementing surface code in a measurement circuit may be configured to translate a quantum algorithm including at least one Hadamard gate into an equivalent circuit that lacks a Hadamard gate, the circuit including Hadamard-conjugated Pauli measurements that include joint logical measurements implemented on diagonally-arranged patches of the surface code.