Abstract: A method for forming patterns of a semiconductor device includes providing a photomask that includes an array of contact holes in an active region, a plurality of first dummy contact holes for restricting pattern distortion of the contact holes in an area outside of the array of the contact holes, a plurality of first assist features for restricting pattern distortion of the first dummy contact holes disposed inside a corresponding one of the first dummy contact holes, and an array of second assist features for additionally restricting pattern distortion of the first dummy contact holes. The array of second assist features is disposed outside of the first dummy contact holes. The method also includes forming an array of contact holes and first dummy contact holes on a wafer by using the photomask as an exposure mask.

Abstract: A method for forming patterns of a semiconductor device includes providing a photomask that includes an array of contact holes in an active region, a plurality of first dummy contact holes for restricting pattern distortion of the contact holes in an area outside of the array of the contact holes, a plurality of first assist features for restricting pattern distortion of the first dummy contact holes disposed inside a corresponding one of the first dummy contact holes, and an array of second assist features for additionally restricting pattern distortion of the first dummy contact holes. The array of second assist features is disposed outside of the first dummy contact holes. The method also includes forming an array of contact holes and first dummy contact holes on a wafer by using the photomask as an exposure mask.

Abstract: Disclosed is a method for forming patterns of a semiconductor device, which includes: arranging dense patterns to be transferred in a dense pattern region of a wafer; inserting a first dummy pattern for restricting pattern distortion of the dense patterns in an outside of the array of the dense patterns; inserting a first assist feature for restricting pattern distortion of the first dummy pattern in an inside of the first dummy pattern; inserting an array of second assist features for additionally restricting pattern distortion of the first dummy pattern in an outside of the first dummy pattern, thereto designing a pattern layout to be transferred onto the wafer; and forming an array of the dense patterns and the first dummy patterns by transferring the pattern layout onto the wafer through an exposure.

Abstract: Disclosed is a method of fabricating an assist feature in a photomask, which includes: fabricating a design layout in which main patterns are arranged; setting a critical dimension (a) of assist features to be formed and a spacing (b) between the main pattern and the assist feature; setting a first expanded region extending from the main pattern by (a+b); setting a second expanded region extending from the main pattern by (b); and setting the assist features by removing the second expanded region from the first expanded region.

Abstract: A wire structure of a semiconductor device capable of ensuring a process margin for bit line patterning in a 6F2 cell layout of a semiconductor device, and a method for manufacturing the same.

Abstract: Disclosed is a method of fabricating an assist feature in a photomask, which includes: fabricating a design layout in which main patterns are arranged; setting a critical dimension (a) of assist features to be formed and a spacing (b) between the main pattern and the assist feature; setting a first expanded region extending from the main pattern by (a+b); setting a second expanded region extending from the main pattern by (b); and setting the assist features by removing the second expanded region from the first expanded region.

Abstract: Disclosed herein are a wire structure of a semiconductor device and a method of making the same. The method includes obtaining a layout of an active region in a semiconductor substrate, the layout extending in a direction diagonally intersecting a layout of a bit line. The method also includes forming an isolation layer that delimits the active region, forming over the semiconductor substrate a stack of a first insulation layer, an etch stop layer, and a second insulation layer, and forming a contact hole penetrating the stack. Further, the method includes forming over the second insulation layer a first mask layer, the first mask layer comprising a filler that fills the contact hole.

Abstract: Disclosed is a method for forming patterns of a semiconductor device, which includes: arranging dense patterns to be transferred in a dense pattern region of a wafer; inserting a first dummy pattern for restricting pattern distortion of the dense patterns in an outside of the array of the dense patterns; inserting a first assist feature for restricting pattern distortion of the first dummy pattern in an inside of the first dummy pattern; inserting an array of second assist features for additionally restricting pattern distortion of the first dummy pattern in an outside of the first dummy pattern, thereto designing a pattern layout to be transferred onto the wafer; and forming an array of the dense patterns and the first dummy patterns by transferring the pattern layout onto the wafer through an exposure.