Patents by Inventor Jeoung Kyu Choi

Jeoung Kyu Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor package with increased number of input and output pins
    Patent number: 6995459
    Abstract: In accordance with the present invention, there is provided a semiconductor package which includes a generally planar die paddle defining multiple peripheral edge segments and including at least two slots formed therein and extending along respective ones of a pair of the peripheral edge segments thereof. The semiconductor package further comprises a plurality of first leads which are segregated into at least two sets disposed within respective ones of the slots included in the die paddle. In addition to the first leads, the semiconductor package includes a plurality of second leads which are also segregated into at least two sets extending along respective ones of at least two peripheral edge segments of the die paddle in spaced relation thereto. Electrically connected to the top surface of the die paddle is at least one semiconductor die which is electrically connected to at least some of each of the first and second leads.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: February 7, 2006
    Assignee: Amkor Technology, Inc.
    Inventors: Choon Heung Lee, Donald C. Foster, Jeoung Kyu Choi, Wan Jong Kim, Kyong Hoon Youn, Sang Ho Lee, Sun Goo Lee
  • Semiconductor package with increased number of input and output pins
    Patent number: 6876068
    Abstract: In accordance with the present invention, there is provided a semiconductor package which includes a generally planar die paddle defining multiple peripheral edge segments and including at least two slots formed therein and extending along respective ones of a pair of the peripheral edge segments thereof. The semiconductor package further comprises a plurality of first leads which are segregated into at least two sets disposed within respective ones of the slots included in the die paddle. In addition to the first leads, the semiconductor package includes a plurality of second leads which are also segregated into at least two sets extending along respective ones of at least two peripheral edge segments of the die paddle in spaced relation thereto. Electrically connected to the top surface of the die paddle is at least one semiconductor die which is electrically connected to at least some of each of the first and second leads.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: April 5, 2005
    Assignee: Amkor Technology, Inc
    Inventors: Choon Heung Lee, Donald C. Foster, Jeoung Kyu Choi, Wan Jong Kim, Kyong Hoon Youn, Sang Ho Lee, Sun Goo Lee